Impedance Tolerance: What to Specify
What the Tolerance Applies To
An impedance specification is meaningless until it says which impedance, measured where and over what frequency. A single line has a characteristic impedance that varies along its length because the dielectric thickness and the trace width vary, and a differential pair has a differential impedance that depends on the coupling between the two traces as well as on their individual geometry. The useful specification names the net class or the layer, the target impedance, the tolerance band and the measurement method. A drawing that says “control impedance to 50 ohms” without those details will be interpreted differently by every shop that quotes it.
Where the Variation Comes From
Five factors dominate. The trace width varies with the imaging and etching process, and because etching produces a trapezoid, the average width is what matters rather than the drawn width. The dielectric thickness varies with the laminate tolerance, the prepreg flow during lamination and the copper distribution on the layers above. The dielectric constant varies with the resin content and the glass weave, and it varies laterally across the panel as traces pass over different parts of the weave. The copper thickness affects the impedance, particularly on thin traces. And the soldermask over the trace loads it electrically, which lowers the impedance slightly compared with a bare trace. Each of these has its own distribution, and the measured impedance is the sum of them.
How It Is Measured
The standard method is time-domain reflectometry on a test coupon built on the same panel, using a probe or a connector to launch a fast edge into a known length of line and reading the impedance from the reflection. The result is an impedance profile along the line, not a single number, and the acceptance criterion is usually applied to the average over a region and to the peak deviation. Alternative methods include a vector network analyser with a calibrated fixture, which gives the impedance over frequency and is closer to how the line actually behaves, and a simple impedance meter for quick checks. All of them measure the coupon, not the product, which is the central limitation of the technique.
Test Coupons and Their Limits
A coupon is a proxy. Its trace width, dielectric thickness and copper distribution are supposed to represent the product, but they are on a different part of the panel and may be built with a different copper density around them, which changes the prepreg flow and hence the dielectric thickness. The coupon is therefore a process monitor rather than a guarantee. Where the design has several impedance classes, the coupon has to have a line for each, and the results should be reported per class. Where the coupon passes and the product fails, the usual reason is that the product area has a different copper density or a different trace width after etching, and the remedy is to make the coupon more representative rather than to tighten the tolerance.

Tightening the Tolerance
A tighter tolerance is achieved by controlling the inputs rather than by asking the shop to try harder. The trace width can be held more tightly by reducing the copper thickness on the layer and by using a process with a better etch factor. The dielectric thickness can be held more tightly by choosing a construction with fewer prepreg plies, since each ply adds its own tolerance, and by using a laminate with a tighter thickness specification. The dielectric constant can be stabilised by choosing a material with a low weave effect, which is the reason spread glass constructions exist. Each of these has a cost, and the cost rises faster than the tolerance tightens.
Cost Consequences
Going from a fifteen percent to a ten percent band costs relatively little on a normal board. Going from ten to five percent typically means a different material, a thinner copper on the signal layer, a construction with fewer prepreg plies and a more careful coupon, and the price reflects all of them. Below five percent the design is looking at a low-loss laminate with a tight Dk tolerance and a shop that can hold a fine line, and at that point the question is whether the circuit actually needs it. Many serial links tolerate a ten percent variation in the line impedance without a measurable penalty, because the receiver equalisation absorbs it, while a narrowband filter or a phase-critical line may need much less.
Specifying It Sensibly
Name the class, the layer, the target and the band. State the measurement method, the coupon location and whether the value is single-ended or differential. State the reference plane arrangement, because a line referenced to two planes behaves differently from one referenced to a single plane. State the frequency or the rise time the measurement should use, since impedance varies with frequency. Then set the band from the simulation that shows what the circuit tolerates, rather than from a generic rule, and check the cost of each step before committing to it.

FAQ
What is a normal impedance tolerance? Plus or minus ten percent is common for controlled-impedance digital boards, with tighter bands available at a cost.
How is impedance verified? By time-domain reflectometry on a coupon built on the same panel, or by a network analyser with a calibrated fixture.
Does the coupon represent my board? Approximately. It is a process monitor, and it can differ from the product where the copper density or the trace width on the product differs.
What causes the largest variation? The dielectric thickness after lamination and the trace width after etching, both of which vary with the construction and the process.
Does soldermask change the impedance? Slightly. The mask loads the trace and lowers the impedance a little compared with a bare trace.
Conclusion
An impedance specification is only useful when it names the class, the layer, the target, the band and the measurement method, and the band should come from what the circuit tolerates rather than from a house rule. Control the inputs that drive the variation, verify on a representative coupon and check the cost of each tightening step. Impedance-capable constructions are listed under PCB capabilities, the etch and lamination tolerances behind them are described in PCB manufacturing, and the line geometry is set in PCB design and layout. Controlled-impedance boards are normally confirmed through prototype PCB assembly in 2026.



