TDR Impedance Testing: How PCB Impedance Gets Verified

Impedance Control Is Only Real If It Is Measured

A controlled impedance specification is a target, not an outcome. A stack-up drawing says that a trace on layer three will present fifty ohms, and that claim rests on a chain of assumptions: the laminate dielectric constant is what the datasheet said, the prepreg thickness is what the drawing specified, the etcher removed exactly the copper it was supposed to, and the plating added exactly the thickness expected. Every one of those steps has a tolerance, and they compound.

Verification is what closes the loop. On high speed boards the accepted method is time domain reflectometry, usually shortened to TDR, applied to a test coupon built on the same panel and by the same process as the production boards.

What TDR Actually Measures

The technique is a direct application of transmission line theory. The instrument launches a very fast step or pulse into the trace and watches what comes back. Wherever the impedance changes, part of the energy is reflected, and the reflection coefficient is a function of the impedance change. Because the signal travels at a known velocity in the dielectric, the time at which the reflection returns also gives the distance to the change.

A single measurement therefore produces an impedance profile along the trace: the impedance of every point, resolved in time and therefore in distance. That is why TDR is more informative than a single number. It does not merely say whether the trace is fifty ohms; it shows whether the impedance is uniform, and where it deviates.

It also demonstrates why the whole subject matters. The same reflections that a TDR trace displays are what produce timing jitter, eye diagram collapse and radiated emissions in a real system. Reading a TDR profile is a way of seeing the mechanism that damages high speed links.

Where Controlled Impedance Is Required

Controlled impedance is routine on DDR memory interfaces, PCIe, USB and HDMI links, radio frequency and microwave circuits, 5G equipment, and automotive and industrial boards with high speed interfaces. The common targets are fifty ohms single ended, and ninety or one hundred ohms differential, with the choice fixed by the interface standard rather than by preference.

The rule of thumb for when a trace has to be treated as a transmission line is that the trace length exceeds roughly one sixth of the electrical length of the signal rise time. Below that length, reflections arrive while the signal is still settling and are absorbed; above it, they become a signal integrity problem. This is the same reasoning described in our notes on PCB design and layout and it is also why HDI PCB designs, with their fine features and dense routing, are especially sensitive to it.

The Test Coupon

Production boards are rarely measured directly, because probing a finished product trace is difficult and often impossible without disturbing the circuit. Instead, a coupon is placed at the edge of the panel. It is built from the same materials, laminated in the same stack, imaged with the same artwork tolerance and etched in the same bath as the production boards, so its geometry tracks the boards it accompanies.

A useful coupon set covers several cases. Single ended microstrip coupons for outer layer traces, single ended stripline coupons for inner layers, and differential coupons for the pairs that carry high speed serial links or memory clocks. The coupon trace should be long enough that the launch and the coupon transition can be separated from the region being measured, with one hundred and fifty millimetres or more being a common working figure. It should also run on the same layer, over the same reference plane, and with the same trace width as the production signals it represents. A coupon that does not match the design proves nothing about the design.

Making the Measurement

A reliable TDR result depends on the setup as much as on the instrument.

• Calibration. The system is calibrated with known reference standards so that the impedance scale and the time base are correct before any board is measured. Calibration quality sets the floor on what the measurement can resolve.
• Probing. A high bandwidth probe with controlled launch geometry contacts the coupon. The launch itself adds inductance and capacitance, which is why the very start of a TDR trace is usually not representative.
• Reference plane discipline. The measurement has to be referenced consistently, since comparing an impedance measured at the coupon pad with one measured at the driver pin is not a comparison at all.
• Multiple traces. Several coupons and several traces are measured rather than one, because a single trace can be unrepresentative and because the spread across the panel is part of what is being verified.
• Documentation. A usable report identifies the coupon, the layer, the trace geometry, the target impedance, the measured value and the deviation, with a pass or fail against the specified tolerance.

Reading the Result

A well made coupon produces a trace that is flat through the region of interest, with the flat level being the characteristic impedance. Deviations at the very start are the launch; deviations at the end are the coupon terminator or the transition to the test pad. The measurement of interest is the plateau between them.

Tolerance bands are stated as a percentage of the target. Ten percent is the standard commercial band. Five percent is the high precision band used for demanding high speed and radio frequency work. Three percent is achievable for special requirements, but it needs to be assessed with the fabricator before it is written into a specification, because the process window becomes narrow and the test and documentation burden rises. The tighter the band, the more the board costs, and this is a decision that should be made against an error budget rather than by default. The standards that frame the requirement include IPC-2141 for controlled impedance design and IPC-6012 for rigid board performance.

What Makes a TDR Measurement Misleading

Several common problems produce numbers that look authoritative and are wrong. Launch inductance or capacitance distorts the first part of the trace, and if the coupon is too short there may be no undisturbed plateau at all. A coupon whose geometry does not match the production traces measures a different structure. Calibration that has drifted, poor probe contact, or measuring at a temperature far from the design condition all shift the result. And measuring before solder mask and finishing, then comparing with a specification written for the finished board, introduces a systematic difference.

These are process control issues as much as measurement issues, and they are why the test report matters as much as the number in it. The discipline behind consistent measurements is the same as for any quality management system: a defined method, a recorded result, and traceability to the panel and the stack it came from.

Where TDR Fits Among the Verification Tools

TDR answers one question well: what is the impedance along this trace. Other tools answer the neighbouring questions. Field solvers and impedance calculators are used before the design is released, and a field solver that accounts for the actual stack and copper geometry is much closer to reality than a simple formula or an online calculator. Vector network analysis measures insertion loss and return loss across frequency, which is the metric that matters for radio frequency performance. Microsectioning reveals the actual geometry of the finished trace and dielectric, which is what explains a TDR result that falls outside the band.

Used together, these methods cover the design, the process and the finished board, which is the combination a serious PCB manufacturing partner is expected to offer. Our overview of PCB capabilities describes where that ends and a different technology begins.

Cost

Impedance control carries a price above an uncontrolled board. As a 2026 reference, a standard board runs about 0.05 to 0.12 US dollars per square inch. Adding impedance control at plus or minus ten percent moves that to roughly 0.12 to 0.25 dollars per square inch, and tightening to plus or minus five percent takes it to about 0.20 to 0.40 dollars per square inch. The increase reflects the narrower process window and the testing and documentation that go with it. Standard lead times for controlled impedance work are typically five to seven working days for prototypes and seven to ten for small batch production, with multilayer capability beyond twenty layers available from specialist suppliers.

Specifying the Requirement

Most impedance failures are communication failures rather than manufacturing failures. Four pieces of information prevent them: the target impedance value, whether the structure is single ended or differential, the tolerance band required, and a stack-up drawing with an impedance table showing which layer and which geometry each requirement applies to. Missing stack information is the single most common cause of a controlled impedance programme going wrong, because the fabricator is then guessing at the dielectric thickness that determines the result. Ask for the TDR report with the delivery, and check that the coupon it describes is the one that matches your design.

Frequently Asked Questions

What does TDR stand for? Time domain reflectometry. It measures impedance by launching a fast signal and analysing the reflections that return.

Why not measure the board itself? Probing production traces is difficult and can disturb the circuit. A coupon built on the same panel and process represents the board without those problems.

How accurate is a TDR measurement? It resolves discontinuities well enough to identify impedance changes along a trace, but the launch, the calibration and the coupon design all limit what the number means.

What tolerance should be specified? Ten percent is standard, five percent is high precision, and three percent is possible for special cases after the fabricator has confirmed the process window.

Does the coupon count as a real verification? Yes, provided it is built from the same stack with the same process and matches the geometry of the production traces it represents.

Conclusion

Impedance control is a claim about the physical board, and TDR is how that claim is tested. A coupon built on the production panel, measured with a calibrated system and a controlled launch, produces a profile that shows the impedance along the trace and the discontinuities that distort it. Read against a specified tolerance band, it converts a design intention into evidence. The measurement is only as good as its setup, so specify the target, the type, the tolerance and the stack, ask for the report, and treat any controlled impedance order that arrives without one as unfinished.