High-Speed Signal Board Design: Routing Techniques That Work
Routing a fast signal is not a matter of drawing the shortest line between two pins. Every conductor has distributed inductance and capacitance, every transition between layers adds a discontinuity, and every place where two lines run parallel creates a path for energy to leak from one to the other. A high-speed signal board is therefore designed around a few techniques that are applied deliberately rather than taste.
Start From the Layer Stack
The first decision is the board itself, and multilayer construction is what makes the rest possible. A stack with dedicated power and ground planes gives every signal a reference to return to, lets a sensitive net be buried between planes where it is shielded, and shortens the distance a signal has to travel by allowing a route to move through a via into a better channel. Choosing the layer count deliberately, rather than as a consequence of the net count, is what keeps the board small and the signal paths short.
The gain is measurable. For the same material, a four layer board has been reported to produce roughly 20 dB less noise than a two layer board of the same circuit, because the reference planes both contain the fields and provide the return path that a two layer board has to improvise. That is why a multilayer stackup is the default for anything with meaningful edge rates rather than an upgrade for difficult designs.
Trace Geometry and Corner Behavior
Signal integrity improves as the route gets straighter. Bends should be shallow, and where a turn is unavoidable, a 45 degree chamfer or an arc is preferable to a right angle: the corner is a discontinuity that radiates and reflects, and the manufacturing process etches an acute angle poorly as well. Reducing radiation and reflection at the corners is one of the few improvements that costs nothing.
The same logic applies to length. A trace between two component pins is not a connection but an inductor and a resistor, and its impedance grows with length. Long connections between fast devices produce reflection and ringing, so the layout should minimize the distance between the pins of a high-speed net even when that means moving a part a few millimetres.
Fewer Vias, Fewer Joints
Every via is a second discontinuity. A plated hole adds capacitance in series with the trace, and the unused portion of the barrel below the layer where the signal enters acts as a via stub, a resonant structure that pulls energy out of the signal at a specific frequency. That penalty is why high-speed nets are routed with as few layer changes as possible, and why each solder joint is also a small capacitor that adds delay. A joint contributes on the order of 0.5 pF, which is negligible once and not negligible in series.
Where a via is necessary, the stub can be controlled by routing the signal on a layer close to the far end of the barrel, by back drilling, or by choosing a stack in which the via is not long. The route that keeps the signal on one layer avoids all of this.
Coupled Noise and How to Contain It
Long parallel runs couple. Where two fast nets must travel side by side, the coupling can be reduced by placing a large ground area on the layer directly beneath them, and by routing adjacent layers in orthogonal directions so that two signal layers never run parallel. Where the coupling must be removed entirely, the aggressor and the victim can be separated by a distance that makes the mutual inductance negligible.
For the most sensitive nets, the standard technique is to enclose the trace with ground on both sides, so that the returning field terminates on the guard rather than on a neighbouring signal. A ground guard trace of this kind has to be grounded at intervals along its length, and it must not itself form a loop: a guard that circles back on itself creates a current path that can couple into the very signal it was meant to protect. Grounding also has to be handled at the transition between domains: an analog ground line and a digital ground line reaching a common reference need a high-frequency choke rather than a plain connection, or the noise they carry will simply move to the other domain. Where several nets share a plane, the return paths overlap unless the layout keeps them apart, which is the subject of multilayer design rules.
Differential Pairs
A differential pair carries its own reference, so the two conductors must be routed as one object. They belong on the same layer, kept close together and parallel, with matched length and no other signal inserted between them. The pair is designed for a differential impedance rather than a single-ended one, and the geometry that produces it is set by the gap between the two traces and their width relative to the reference plane. A pair that is split around an obstacle and rejoined destroys the coupling that made it differential in the first place, and the discontinuity it creates is worse than the one it was routed to avoid. The rules that govern the geometry are collected in right-angle routing and differential traces.
Where a pair crosses a plane split or a reference change, the return current has no continuous path, and the pair radiates at that point. Keeping the reference plane unbroken under the whole pair is more important than any refinement of the trace geometry.
Length Matching
When several nets carry the same parallel data, they have to arrive together. Length matching is the practice of making the routed length of each net equal, usually to within a tolerance expressed as a fraction of the rise time, and it is applied to the data lanes and the clock as a group. Where the geometry forces a longer route on one net, the difference is absorbed deliberately, usually with a serpentine pattern that adds length without adding area.
Serpentine routing has limits. The added length must not create coupling between adjacent turns of the same serpentine, and the pattern should be placed away from other sensitive nets and from the reference plane edges. The amplitude and the pitch of the pattern determine how much it radiates and how much it disturbs the local impedance, which is why the tolerance should be set by the timing budget rather than by the ambition to match perfectly. The method is described in serpentine routing and length matching.
What to Check Before Release
Four checks catch most of the problems. Confirm that every high-speed net has a continuous reference plane beneath it, including through every via transition. Confirm that differential pairs are on one layer and that no other net passes between them. Confirm that the longest and shortest nets in each matched group are within the tolerance the timing budget allows. And confirm that no trace has a stub or a branch, because a short unconnected stub is a resonant structure rather than a harmless leftover.
Two more checks belong to the stack rather than to the routing. Verify that the impedance targets are recorded per layer, and verify that the line width used in the calculation corresponds to the copper weight being purchased. Once those are correct, the geometry that follows is a matter of applying the techniques consistently. The microstrip and stripline geometries that the calculations assume are compared in microstrip and stripline routing.
FAQ
Why does a four layer board produce less noise than a two layer board? Because the reference planes both contain the fields and provide a continuous return path, which a two layer board cannot do without compromising the routing.
What is a via stub and why does it matter? It is the unused part of a plated barrel below the layer where the signal enters. At high frequency it resonates and removes energy from the signal at a specific frequency.
Can a ground guard trace make coupling worse? Yes, if it is not grounded at intervals or if it forms a closed loop. A guard with a loop carries a current of its own and can couple into the signal it was meant to shield.
How tight should length matching be? Set by the timing budget rather than by symmetry. Tighter matching costs area and adds serpentine routing that itself introduces coupling.
