High Speed Routing Rules for PCB Layout
The rules that govern high speed routing are widely published, and most of them are accurate. The difficulty is that they are not all equally important, and a designer who tries to satisfy every one of them produces a board that is expensive, difficult to route and not measurably better than one where the three or four decisive rules were followed carefully.
What follows is a practical ordering. The rules are presented in the sequence that matters, starting with the ones that decide whether the channel works at all and ending with the ones that improve margin in the last few percent.
Give Every Signal a Return Path
The current that leaves a driver returns to it, and at high frequency it returns through the path of least inductance, which is the plane directly beneath the trace. If the trace crosses a split in that plane, the return current has to detour, and the detour enlarges the loop area. The result is radiated emission, increased crosstalk and a discontinuity that shows up as a reflection in the eye diagram.
This is why plane integrity comes before any other rule. A stack-up that provides a solid reference plane adjacent to every routing layer makes the remaining rules much easier to satisfy, and a stack-up that does not cannot be rescued by careful routing. Checking that no critical net crosses a split, which is a task that can be automated, catches more real problems than any amount of attention to trace geometry. Related practice is set out in the notes on power plane design and reference plane management.
Control the Impedance Along the Whole Path
An impedance target applies to the entire channel, not to the trace. The driver, the package, the ball, the via, the connector and the receiver all contribute discontinuities, and the trace is only one of them. A design that achieves a perfect fifty ohm trace but transitions through a via with two millimetres of stub has not controlled the impedance of the channel in any useful sense.
Practical measures follow from that. Vias on high rate nets should be back drilled or placed in a stack-up where the stub is short, and the antipad should be sized deliberately rather than left at the default. Where a connector is unavoidable, its model should be part of the channel simulation, because the discontinuity it introduces is usually larger than anything on the board. The rule that matters is consistency: a channel with uniformly modest discontinuities performs better than one with a single large one.
Keep Coupling Under Control
Crosstalk is a function of the distance between traces, the height above the reference plane and the length over which the two run in parallel. Of those, the height is the one that changes the most between designs, because it is set by the stack-up rather than by the layout. A trace that is far from its reference plane couples more strongly to its neighbours, which is why thin dielectrics are used for dense high speed routing even when the impedance target could be met with a thicker one.
The rules that follow are straightforward. Increase the spacing between a victim and an aggressor until the coupling is acceptable rather than to a fixed multiple of the trace width, keep parallel runs short, and separate the routing of different classes so that a clock does not run beside an analogue sense line for any distance. Where a wide bus must be routed together, the outer traces of the group are the ones that benefit most from extra spacing, and the ones in the middle can be left closer together.
Match Lengths Only Where It Matters
Length matching is applied far more often than it is needed. A differential pair needs its two traces matched so that the common mode conversion stays low, and a parallel bus needs matching within a fraction of the bit period when the data is captured on a common clock. A pair of unrelated signals that happen to be routed near each other does not need matching at all.
Where matching is required, the tolerance should be derived from the timing budget rather than chosen from habit, and the matching should be applied where the signal is slow rather than where it is fast. Adding a serpentine to a high speed net introduces its own discontinuities, so the compensation should be placed near the source or at a point where the signal has already been degraded, which is why the techniques described in serpentine length matching emphasise geometry as much as length.
Differential Pairs and Their Details
A differential pair is two single ended traces that happen to be routed together, and each of them needs its own return path. The most common error is to route the pair across a plane split, which forces the return current of both traces to detour and destroys the benefit of the differential topology. The second most common error is to separate the two traces widely at a connector or a via field, which converts part of the differential signal into common mode.
Intra pair skew should be kept small, and the two traces should be routed with a consistent spacing for their whole length. Symmetry around a via field is more valuable than a tight spacing, because the skew that a mismatched via transition introduces cannot be removed later. Termination should match the differential impedance of the pair as routed, including the effect of the reference plane and the solder mask, rather than the impedance quoted for the stack-up in isolation.
Process Control and Verification
On a design of this kind, return path is the item that decides how the rest of the board is arranged. Where the requirement is not written down, the shop supplies its own default, and the default is chosen for the process rather than for the design. The measurements that matter are the repeatable ones: conductor width and spacing, annular ring, finished hole size, plating thickness and surface finish are all verifiable on a coupon that travels with the panel.
Running a first article through the same checks as the production panel confirms that the two agree, and that comparison is the cheapest form of process control available at prototype stage.
Related reading: our fabrication notes, board quality and design release notes cover the same ground.
Process Control and Verification
On a design of this kind, return path is the item that decides how the rest of the board is arranged. Where the requirement is not written down, the shop supplies its own default, and the default is chosen for the process rather than for the design. The measurements that matter are the repeatable ones: conductor width and spacing, annular ring, finished hole size, plating thickness and surface finish are all verifiable on a coupon that travels with the panel.
FAQ
Which rule should be checked first? The reference plane. Almost every other problem, from emission to reflection, is worse when the return path is interrupted.
Is length matching always required for a differential pair? Yes, but to a tolerance derived from the data rate. At low rates the required match is loose enough that ordinary routing usually satisfies it without deliberate serpentines.
How much spacing is enough to avoid crosstalk? Enough that the coupled noise stays inside the margin of the receiver. Three times the trace width is a common starting point, but the number should follow from the stack-up and the timing budget.
