Hardware Design Review Checkpoints That Catch Errors
Most of the errors that reach a prototype are not logic errors. The schematic is usually correct in the sense that it implements the intended function, and the layout passes its design rule check. The failures that appear at bring up are usually the result of an assumption that was never verified, or of a constraint that was satisfied in one place and violated in another.
A review that looks for a small number of recurring patterns catches more of those errors than a line by line check of the whole design. This article sets out four of those patterns and the questions that expose them.
Why Errors Survive A Schematic Review
A schematic review verifies connectivity, and connectivity is not the same as function. Two nets that are joined in the drawing may be joined in a way that does not work, because the specification that makes the connection valid is not in the drawing. An input that tolerates a voltage only under a condition described in a footnote, a part that requires a supply to be present before another, and a pin that must not be left floating are all examples.
The practical countermeasure is to read the notes under the parameter table rather than the table alone, and to record the conditions that the design depends on. A list of the assumptions that a design makes is a more useful review document than a printout of the schematic, because it can be checked against the datasheets one by one.
A review is most effective when it is carried out twice: once on the schematic, where the assumptions are checked against the datasheets, and once on the layout, where the physical realisation is checked against the assumptions. The two pass structure catches the errors that are invisible in either view alone.
Decoupling Capacitor Placement And Loop Area
A decoupling capacitor works by providing a short path for the current that a device draws when it switches. The impedance that matters is the loop formed by the capacitor, the supply pin and the ground return, and the area of that loop sets the inductance. A capacitor placed a centimetre away from the pin has a loop that is several times larger than one placed next to it, and the inductance rises with the loop area.
The review question is therefore not whether the capacitor is present but whether the loop is small. Each capacitor should have its ground via directly beside its pad, and the supply connection should reach the plane without a long detour. Where several devices share a rail, the supply should reach each one by a short branch from the plane rather than by a daisy chain through the previous device, and a bulk capacitor should be present where the rail enters the board.
ESD Protection At The Connector
An ESD protection device protects by diverting the transient before it reaches the sensitive circuit, and it can only do so if the transient arrives at the device first. A device placed a couple of centimetres inside the board allows the trace between the connector and the protector to carry the discharge into the circuit, and the protection then limits the damage rather than preventing it.
The review question is whether the protector is the first component the transient meets and whether its return path is short. The clamp should connect to the ground plane with a via beside its pad rather than through a length of trace, because the inductance of that trace raises the clamping voltage. The protected net should not run parallel to an unprotected one for any distance, since coupling would bypass the device entirely.
Differential Pair Routing Pitfalls
A differential pair is protected by the symmetry between its two conductors, and anything that breaks the symmetry converts part of the signal into a common mode component. The usual violations are a length difference between the two conductors, a spacing that changes along the route, and a section where one conductor crosses a plane split and the other does not.
The review questions are whether the two conductors have the same length to within a small fraction of the rise time, whether the spacing is constant, and whether the pair crosses any plane boundary. A serpentine added to equalise the length can itself be the problem if it is placed close to the receiver, because the discontinuity it introduces reflects the signal. The techniques for spacing between nets and for routing a switching supply are worth checking alongside the pair itself, since the aggressor is often a neighbouring net rather than the pair.
Thermal Via And Power Dissipation
A component that dissipates power through its underside needs a path into the copper beneath it, and that path is a set of thermal via placed in the pad or in a copper area connected to the pad. Without them the heat has only the thin copper of the pad and the laminate beneath, and the temperature rises far above the value calculated from the copper area alone.
The review question is whether the thermal via are present, whether they are connected to an internal or a bottom plane that can spread the heat, and whether the plane is large enough to act as a heat sink. The number that matters is the total copper area connected to the device, not the number of via in isolation, and the current carrying traces should be checked with a trace width calculation against the permitted temperature rise. A power stage that passes a thermal calculation on paper and runs hot on the bench usually has a missing connection between the pad and the copper that was assumed to be there.
Final Checks Before Release
The last review before the artwork is released should confirm that the assumptions recorded at the start have been verified, that the footprints match the manufacturer drawings rather than a library part of unknown origin, and that the assembly drawing names the parts that have an orientation. Each of those checks is quick, and each of them catches a class of error that a design rule check cannot see.
It is also worth confirming that the panel and the assembly process can actually produce the design, since a feature that the fabricator cannot hold is not a design improvement. A short conversation with the fabrication and assembly partners at that point is cheaper than a respin, and it is the step that turns a design that works on the bench into a product that can be built in volume.
FAQ
Why do errors survive a design rule check? Because a design rule check verifies the geometry against a set of limits. It cannot verify that a component is used within the conditions described in its datasheet, or that a protection device is placed where it can work.
Is a decoupling capacitor effective if it is a centimetre from the pin? It still supplies charge, but the loop inductance is much larger, so it is far less effective at the frequencies where the switching noise sits. Placement is part of the function.
How many thermal via are needed under a power device? Enough to carry the heat into a copper area large enough to spread it. The area of connected copper is the governing figure, and the via are the entry to it.
