Microcontroller Clock System Design and Clock Source Selection

Every microcontroller peripheral is timed from the same tree, so the microcontroller clock system design decides start up time, accuracy, power consumption and electromagnetic behaviour at once. The choice of clock source is therefore a system decision rather than a component decision.

What a Clock Tree Contains

A clock tree begins at one or more clock source blocks and ends at the dividers that feed the core, the bus, the flash interface and each peripheral. Between them sit the multipliers and the multiplexers that select the active path.

The tree is usually drawn as a single output clock that is divided and distributed. Understanding which divider reaches which peripheral is what makes it possible to run a slow bus and a fast core from one reference without adding a second oscillator.

Internal Reference Clocks

Most microcontrollers include an internal RC oscillator, often with a fast and a slow variant. The internal clock source costs nothing, needs no board area and is available within microseconds of power up, which makes it the default after reset.

Its weakness is accuracy and drift. A trimmed RC oscillator may hold a few percent over temperature, which is adequate for a serial port at low speed but not for a USB interface, a radio or any timing that must hold over years.

External Clock Sources

An external clock source can be a packaged oscillator that drives a single input pin. It provides accuracy, fast start up and a defined output level, at the cost of one more component and a higher supply current than a crystal.

A clock input pin should be treated as a sensitive node. Keep the trace short, reference it to the local ground and terminate it as the oscillator data sheet requires, because a noisy clock edge becomes jitter in every peripheral that uses it.

Crystal Oscillator Circuits

A crystal oscillator uses two pins and works with the internal oscillator core of the device. It is the cheapest way to obtain an accurate reference, and it is also the most sensitive to layout of any part of the clock tree.

Place the crystal as close to the pins as the mechanical layout allows, keep the load capacitors on a short ground return, and place a local ground area beneath the resonator. Keep switching nodes, inductors and high speed data away from that area.

Real Time Clocks

A 32 kHz resonator drives the real time clock and the low power domain. Because the frequency is low, the impedance is high and the circuit is easily disturbed by stray capacitance and by flux residue left on the board after assembly.

Clean the area under the RTC crystal, guard it with ground, and avoid routing any signal beneath it. A few picofarads of coupling on this node shows up as seconds per day of timing error that is difficult to diagnose later.

Phase Locked Loop and Frequency Locked Loop

A phase locked loop multiplies a reference until the output frequency is a defined multiple of the input. It is what allows a 12 MHz crystal to clock a core at well over one hundred megahertz while a serial port still sees a clean divided rate.

The locked loop needs time to settle, and its lock has to be confirmed before the clock is switched to it. A frequency locked loop is a lower cost alternative that does not use a feedback phase detector, with looser jitter but faster lock and lower power.

Clock Modes and Transitions

Devices usually define a set of clock modes that describe which source drives the output and whether the multiplier is enabled or bypassed. The modes are named from the source and the state of the loops, and only some transitions between them are legal.

The sequence matters. The usual path is to start on the internal reference, enable the external source and wait for it to stabilise, then enable the loop, wait for lock and only then switch the output. Skipping a step produces a brief loss of clock that resets the core.

Dividers and Peripheral Rates

Dividers set the bus, flash and peripheral rates from the output clock. The core may run at full speed while the bus runs at half and a serial peripheral runs at a small fraction of that, and each domain has its own maximum.

Check every divider against the data sheet rather than against a working example. A bus that is overclocked may still run at room temperature and fail in the field, and flash access time is often the first limit that is exceeded.

Low Power Mode Entry

Entering a low power mode means stopping or gating parts of the tree in a defined order. Peripherals that must wake the device keep their clock source alive, while everything else is switched off to remove dynamic current.

The wake up path has to be planned as carefully as the sleep path. The clock required by the wake source must be the one that is retained, and the code that follows the interrupt must not assume a frequency that is no longer present.

Jitter and Electromagnetic Behaviour

A fast clock edge with a short rise time radiates. Where the clock leaves the board, or where it runs beside a cable, a series resistor at the source and a controlled slew rate reduce the harmonic content without affecting the timing at the load.

Spread spectrum modulation moves the energy of the clock over a band instead of concentrating it at one frequency. It helps with emissions but adds jitter, so it belongs only on clocks that do not drive a timing sensitive interface.

Verification on the Bench

Measure the clock at the pins with a low capacitance probe, and check the start up time from reset to the first instruction. Confirm the loop lock bit and the measured frequency, not just the configured values.

Then check the tree under load, including temperature. A clock that is marginal at the low end of the ambient range usually shows up as a communication error rather than as a clock fault, which is why the two are worth measuring together.

Process Control and Verification

On a design of this kind, crystal oscillator is the item that decides how the rest of the board is arranged. Where the requirement is not written down, the shop supplies its own default, and the default is chosen for the process rather than for the design. The measurements that matter are the repeatable ones: conductor width and spacing, annular ring, finished hole size, plating thickness and surface finish are all verifiable on a coupon that travels with the panel.

Related reading: our fabrication notes, board quality and design release notes cover the same ground.

FAQ

Can the internal RC oscillator be used as the permanent clock? For a product with no accurate timing requirement it can, and it saves a component. Where a serial protocol, a radio or a calendar has to stay accurate, use a crystal or an external clock instead.

Why does the device sometimes fail to start with an external crystal? The most common causes are excessive load capacitance, a long or asymmetrical trace to the pins, and a crystal outside the drive level range of the internal core. Check all three before changing the device.

Is a higher core frequency always better? No. It raises current consumption and emissions, and the bus or flash may not keep up. Choose the frequency the workload needs and use a low power mode for the idle time.