Via in Pad: Filling, Plating and Design

Why Put a Via in a Pad

Placing a via directly in a component pad solves two problems at once. It removes the short stub of trace that would otherwise run from the pad to a via placed beside it, which matters at high frequency and on fine-pitch packages, and it frees the routing area that the escape via would have consumed, which matters on dense boards and under a large BGA. The price is that the pad now has a hole in it, and a hole through a pad will pull solder paste away from the joint during reflow through a mechanism known as wicking, leaving a starved joint or an open. Filling and capping the via is what makes the technique usable.

The Filling Problem

An unfilled via under a pad acts as a small reservoir. When the paste melts, the alloy flows down the barrel and away from the joint, and the solder that was meant to form the fillet ends up inside the via. On a dense ball grid array the result is a joint that looks formed and is electrically open, or one that is intermittent after thermal cycling. Filling the barrel with a material that does not melt removes the reservoir and restores the pad to a solid surface.

Filling Materials

Two families are used. Conductive fill is an epoxy loaded with metal particles, usually silver or copper, which plugs the via and provides a degree of electrical continuity through the barrel. Non-conductive fill is an epoxy without metal, and it relies on the plated barrel to carry the current while it plugs the hole mechanically. A conductive fill is preferred where the via carries current or where the fill is also expected to contribute to thermal transfer; a non-conductive fill is cheaper, more common, and entirely adequate where the barrel plating is sound. Both have to be applied, cured and then planarised so that the fill is flush with the surface rather than domed or recessed.

Capping and Plating Over

After filling, the via is usually capped: a copper layer is plated over the filled hole so that the pad is a continuous metal surface again. This is what gives the best paste release and the most uniform pad. Capping is the more expensive option because it adds plating and imaging steps, and it is standard practice for via-in-pad on fine-pitch packages. Where the via is filled but not capped, the pad has a small step or a slightly different surface, and the stencil aperture has to account for it. The choice between filled and filled-and-capped should follow from the component pitch and the paste volume the joint needs.

Planarity and the Paste Deposit

The pad has to be flat enough for the stencil to seal against it. A fill that is recessed by even a few tens of micrometres leaves a gap under the stencil, and paste leaks into the recess instead of transferring onto the pad. A fill that stands proud lifts the stencil locally and over-deposits around the via. Planarity is therefore a specification, usually expressed as a tolerance on the fill height relative to the pad surface, and it is the number that decides whether the stencil can be used with a normal aperture or needs a special design. Where planarity cannot be held, the alternative is to reduce the via diameter so that the recess is small relative to the aperture, or to move the via out of the pad.

Design Rules

Fill only the vias that will actually be under a component pad or that need thermal transfer; filling every via on the board adds cost for no benefit. Keep the via in the centre of the pad where the geometry allows, so that the fill and the cap are supported symmetrically. Respect the minimum pad annular ring the shop can hold around a filled via, because the cap has to overlap the pad on all sides. Where several vias are placed in one large pad, such as a thermal pad under a power device, specify whether the fill is conductive, since thermal performance depends on it. Finally, check the finish on a capped pad, because plating over a filled via can produce a slightly different surface than the surrounding copper.

Process and Cost

Via in pad with filling adds steps to the fabrication: fill, cure, planarise, and cap if required. Each step adds handling and yield risk, and the planarity requirement drives the equipment used. The cost is therefore not simply a per-via charge; it depends on how many vias are involved, whether any of them are capped and how tight the planarity specification is. Where the design can avoid via in pad by routing the escape to a via placed just outside the pad, that remains the cheaper option, and the decision should be made from the routing density and the electrical requirement rather than by default.

Variants and the Assembly Interaction

Via in pad changes what happens downstream, so the process has to be planned as a whole. The solder paste volume that a filled and capped via allows is smaller than on a plain pad, because the cap sits flush and the aperture can only print what the stencil releases. On a large thermal pad with several filled vias, the paste often has to be split into a grid of small apertures rather than one large one, so that the stencil does not bridge and the flux does not trap voids under the component. Reflow is also affected, because the thermal mass of a pad with many filled vias is higher than the surrounding area, so the profile has to reach those joints as well. Inspection is harder as well: an X-ray image of a joint over a filled via shows the fill as a shadow, and the inspector has to know to expect it rather than reading it as a void. Documenting the via-in-pad locations on the assembly drawing removes most of that ambiguity.

FAQ

What is via in pad? A plated via placed inside a component pad, normally filled and often capped so that the pad can accept solder paste.

Why must it be filled? Because an open barrel draws molten solder away from the joint during reflow, which starves the joint or leaves it open.

Conductive or non-conductive fill? Conductive where the via carries current or must transfer heat; non-conductive is cheaper and adequate where the barrel plating carries the current.

Does it have to be capped? Capping gives the flattest pad and the best paste release, and is normal on fine-pitch packages, but it adds plating steps and cost.

What tolerance matters most? Planarity of the fill relative to the pad, because the stencil has to seal against the pad surface.

Conclusion

Via in pad is a packaging technique that trades fabrication cost for routing freedom and a shorter electrical path, and it only works when the barrel is filled and the pad is flat. Fill only the vias that need it, specify the fill material from the electrical and thermal requirement, and state the planarity tolerance rather than leaving it to the process. Via and pad capabilities are listed under PCB capabilities, the filling and capping steps are described in PCB manufacturing, and the escape routing that decides where the vias go is part of PCB design and layout. Dense packages with via in pad are normally assembled through SMT PCB assembly in 2026.