PCB Traces: Width, Copper Weight and Current Capacity
The Copper That Carries Everything
Every electrical function on a printed circuit board is performed through copper traces. They replaced discrete wiring decades ago, and they now carry both power and signal across the same substrate, at current levels from microamps to tens of amps and frequencies from DC to tens of gigahertz. Designing them well is a matter of choosing the right copper thickness, width, spacing and routing, and getting those choices wrong produces failures that range from intermittent to catastrophic.
This guide covers the structure of a trace, the materials used, the relationship between width, copper and current, high frequency considerations, surface finish, common failure modes and the practices that improve reliability.
What a Trace Is
A PCB trace is a conductive path formed from copper foil that connects integrated circuits, resistors, capacitors and connectors. Its structure is defined by three things: copper layer thickness, trace width and geometry, and the dielectric properties of the substrate beneath it. On multilayer boards, inner layer traces are buried inside the dielectric, which saves space and increases routing density while changing the thermal behaviour, because inner traces dissipate heat less effectively than outer ones.
Trace geometry is not only a routing concern. It determines characteristic impedance, and therefore signal integrity, which is why geometry decisions on high speed nets are electrical rather than mechanical choices.
Materials
Electrically deposited copper foil is the standard material, specified by weight. One ounce copper, approximately 35 microns thick, covers conventional applications. Two to three ounce copper is used for high current designs. In flexible circuits, conductive silver ink is sometimes used instead of copper foil, because it tolerates bending better.
Increasing copper thickness raises current capacity and improves thermal spreading, but it also constrains minimum trace width and spacing, because thick copper etches differently. That trade-off is the central one in power board design, and it is discussed further under heavy copper PCB.
Width and Spacing
Trace width and spacing together determine three properties: insulation performance, electromagnetic interference behaviour, and current carrying capacity.
IPC-2221 provides the standard engineering reference for these relationships. High voltage circuits require wider spacing to prevent breakdown, and the creepage and clearance rules become the governing constraint rather than the routing density. High density digital circuits use narrower spacing, which raises manufacturing cost and reduces the voltage withstand. Typical minimum widths are six to eight mil for conventional boards, with HDI processes reaching three mil.
Current Carrying Capacity
Four factors determine how much current a trace can carry: ambient temperature, copper thickness, trace width and layer position. Inner layer traces run hotter for the same current because the dielectric above and below them insulates rather than conducts heat away, which is why the same trace geometry carries less current on an inner layer than on an outer one.
Design should be based on an acceptable temperature rise rather than on a single current figure, because the limiting factor is the temperature the dielectric can tolerate. Overload produces trace fusing, delamination or fracture, and on a power board the failure is often mechanical before it is electrical. Where the current requirement exceeds what a reasonable trace width can carry, the practical answers are heavier copper, multiple parallel traces, or a copper plane used as the conductor. As a rule of thumb, currents above five to eight amps generally call for two to three ounce copper.
High Frequency Traces
At high frequency the trace behaves as a transmission line, and the design requirements change. Impedance matching becomes mandatory. Crosstalk must be controlled through spacing, reference plane continuity and routing discipline. Return path planning matters as much as the forward path, because the return current follows the path of least inductance directly beneath the trace, and interrupting it creates radiation and reflection.
Two physical effects also appear. Skin effect concentrates current near the conductor surface, which raises effective resistance and loss. And surface roughness of the copper contributes additional loss at high frequency. Microstrip and stripline are the two standard transmission line geometries, chosen according to whether the trace must be exposed or can be buried. The layout practices behind this are covered under PCB design and layout.
Surface Finish
Surface finish protects the copper from oxidation and preserves solderability, and the choice affects trace resistance and long term stability. Electroless nickel immersion gold offers excellent flatness and is widely used for fine pitch assembly. Hot air solder levelling is inexpensive but less flat. Immersion silver offers good conductivity and is well suited to high frequency boards, as described under immersion silver finishing. OSP is economical and corrosion resistant but has a limited shelf life. On high frequency designs the finish also contributes to insertion loss, which is why finish selection is not purely an assembly decision.
Functional Categories
Traces fall into three functional groups. Power traces carry current and need to be wider, with the width determined by the current and the acceptable temperature rise. Signal traces carry data and need stable impedance, with the geometry determined by the target impedance and the reference structure. Ground traces provide the reference potential and should be replaced by a ground plane wherever possible, because a plane provides a far lower inductance return path than any trace can.
The design emphasis differs accordingly: high power traces are a thermal design problem, and high speed traces are a signal integrity problem. Boards that contain both require deliberate separation between the two domains.
Failure Modes
Four failure modes account for most trace-related field problems. Overcurrent fusing, where the copper simply cannot carry the current. Mechanical cracking from bending or vibration, which is most relevant on flexible and rigid-flex boards and at via transitions. Moisture corrosion, which attacks exposed copper and is accelerated by flux residue and contamination. And thermal stress delamination, where repeated expansion separates copper from the dielectric beneath it. These failures often present as intermittent faults rather than clean opens, which makes them expensive to diagnose in the field. The surrounding thermal context is covered under thermal management.
Improving Trace Reliability
Four measures address the failure modes directly. Increase copper thickness where the current demand justifies it, which reduces both resistive heating and thermal stress. Add thermal vias so that heat can move away from a hot trace rather than accumulating in the dielectric. Apply a protective coating to seal the surface against moisture and contamination, which is where conformal coating earns its place. And avoid sharp ninety degree corners on high frequency traces, because the corner creates an impedance discontinuity and a point of field concentration.
Best Practices
Six practices cover most of the design discipline. Plan the stackup before routing, so that power and signal layers are assigned deliberately. Keep differential pair spacing consistent along the whole length. Shorten high speed routing paths rather than simply connecting the endpoints. Route sensitive traces away from high power noise sources. Maintain a complete ground plane under signal traces. And control impedance where the signalling rate requires it, which also reduces emissions.
Repair
Trace damage is sometimes repairable, particularly on prototype and low volume assemblies. Copper foil patches, conductive adhesive and fine jumper wires are the standard techniques. Minor burns can sometimes be repaired by opening the solder mask and bridging with solder. For high current traces, reinforcement with additional copper is advisable rather than a simple bridge, because a repair that carries less current than the original trace will fail again. Repair is a remedy for development builds; a production design that requires it needs a redesign.
Cost Factors
Four factors drive cost: trace density, where finer features cost more; layer count; copper thickness, since heavier copper increases material cost and reduces etch yield; and precision tolerance, where laser imaging supports tighter capability. Our notes on PCB manufacturing explain how these combine with the rest of the fabrication cost.
Questions Engineers Ask
What is the minimum trace width? Six to eight mil is typical, with HDI processes reaching three mil.
What copper weight is needed for high current? Two to three ounce copper is generally recommended above five to eight amps.
Can traces carry high frequency signals? Yes, but impedance must be controlled and the routing must use proper transmission line geometry. Maintaining a continuous reference plane matters as much as the trace itself.
Can a broken trace be repaired? Sometimes, using a copper patch, conductive adhesive or a fine jumper. On a production board, a design that requires repair should be revised instead.
Does surface finish affect trace performance? Yes, both through the surface conductivity and, at high frequency, through its contribution to insertion loss.
Summary
Traces are where electrical design meets manufacturing reality. Copper weight, width, spacing and geometry determine current capacity, impedance, emissions and reliability, and each of those constraints interacts with the others. The design discipline is straightforward: choose copper and width from the current and thermal requirement, choose geometry and reference structure from the impedance requirement, keep power and signal domains separate, protect the surface, and avoid the sharp corners and interrupted return paths that create both emissions and failure points.
