Fabricating High Layer Count Boards from Twenty to Forty Layers

Above twenty layers, board fabrication stops behaving like an enlarged version of an ordinary process and starts behaving like a different one. The reason is cumulative: every additional pair of layers adds a lamination cycle, and every lamination cycle adds an alignment step whose tolerance contributes to the total. A high layer count board is therefore not merely taller than a six layer board; it is a product whose yield depends on the accumulation of small errors across a sequence that a thin board never performs.

Building the Stack

The stack is built by pressing pairs of layers together in sequence. The inner cores are imaged and etched first, then laminated in pairs or in groups, drilled and plated, and the outer layers are added at the end. Each press is an opportunity for a layer to shift, and the shift is not corrected by the next operation because the copper has already been bonded into the structure.

The practical consequence is that the inner layers carry a tighter registration requirement than the outer ones. An inner layer that is displaced by more than its allowance has no route back to the correct position, while an outer layer can be adjusted after pressing. That is why the artwork for a tall stack specifies the registration tolerance per layer rather than as a single figure for the finished board.

Registration and the Accumulated Tolerance

The registration of the finished board is the sum of the errors introduced at each step, measured at the point where it matters most, which is usually the smallest via on the outer layers. An annular ring that looks generous on the design rule table may be unbuildable in practice at the top of a twenty layer stack, because the drill has to pass through every layer that has accumulated a deviation.

The control is a combination of the artwork design, the tooling and the measurement. The design leaves an annular ring that accounts for the accumulation rather than for a single drilling tolerance. The tooling is arranged so that the layers are located by a common reference rather than by successive approximations. And the measurement is performed after the press by X-ray, so that the registration of the actual board is known rather than assumed from the process capability.

Aspect Ratio and the Drilling

A thick board with small holes produces a high aspect ratio, which is the ratio of the board thickness to the drill diameter. Plating a high aspect ratio hole is difficult because the chemistry has to reach the middle of the barrel and the plating has to be uniform along its length, and a barrel that is thin in the centre is a barrel that will crack under thermal cycling even though it measures correctly at the ends.

The limit on the aspect ratio is therefore a limit on the smallest via that can be used in a tall stack, and it propagates back into the design as a constraint on the via count and on the routing density. A design that requires more vias than the aspect ratio allows has to move to a different construction, such as a blind via arrangement that reduces the depth each via has to travel.

The drilling itself is a toleranced operation on a thick board. The entry and exit positions have to be controlled, the drill has to clear the chips from a deep hole and the material has to withstand the heat generated. A drill that wanders in a tall stack produces a hole whose position at the bottom is different from its position at the top, and both have to fall inside the pad.

Where Back Drilling Fits

A through via that passes through every layer of a tall stack leaves an unused section beneath the layer it connects to, and that section behaves as a stub with an electrical effect at high frequency. Back drilling removes the unused portion by drilling it out after the plating, which improves the electrical performance at the cost of a second drilling operation with a depth tolerance.

The depth control is the difficulty. The back drill has to remove the stub without touching the layers the via serves, and the tolerance is set by the thickness of the layers near the target. On a thick board the depth is long and the control is proportionally harder, which is why the back drilling requirement belongs in the stack-up decision rather than being added to the fabrication drawing at the end.

What the Design Has to Know

A design destined for a tall stack has to be written with the fabrication constraints visible. The smallest via is set by the aspect ratio, the annular ring is set by the accumulated registration, the layer assignment is set by the impedance and the routing requirements, and the back drilling is set by the electrical performance of the vias.

None of those is a detail that can be settled after the layout. They are the constraints the layout is drawn inside, and a design that has been produced without them will be revised during fabrication, when every change costs a new set of artwork and a new schedule. The capability limits for this class of work are stated on the PCB capabilities page, the manufacturing is handled under PCB manufacturing, the design support is available through PCB design and layout, the records are held with quality management and the assemblies follow through SMT assembly and PCBA testing.

Where the Yield Comes From

The yield of a tall stack is dominated by the operations that are performed once and cannot be repeated. A registration error introduced at the first lamination is carried through the remainder of the build, and by the time the board is finished the error is visible only as a reduced annular ring or an intermittent open. The same applies to a plating defect in a deep barrel: it is created early and it is discovered at the electrical test, which is the last stage of a process that has already consumed all of the material.

The response is measurement at the points where correction is still possible rather than inspection at the end. The registration is confirmed after each press by X-ray, the plating is verified by cross section on a sample from the batch, and the impedance is measured from a coupon that travels with the panel. Those measurements can each stop a batch that is drifting, and stopping a batch is cheaper than discovering the drift in the electrical test.

It also follows that a tall stack is a poor candidate for an experiment. A design that pushes the layer count up to avoid a routing problem, without a reason rooted in the electrical requirement, has taken on a fabrication risk in exchange for a layout convenience, and the exchange is rarely favourable.

Communicating the Requirements

The fabrication documentation for a board of this class has to state more than the ordinary drawing. The stack-up with the material and the copper weight of each layer, the impedance targets and the layer each one applies to, the drill schedule with the via types and their depths, the registration requirement where it is tighter than the standard, and the surface finish with the tolerance. A drawing that omits any of those leaves the fabricator to choose, and the choice will be made on the fabricator’s own preference rather than on the design’s requirement.

The conversation that produces that document is best held before the layout is finished, because several of the entries depend on decisions the designer has not yet made. A fabricator who is involved at that point can propose a stack-up that satisfies the electrical requirement and is buildable at a better yield, and the proposal is worth more than any later negotiation on the price.

FAQ

What limits the smallest via in a tall stack? The drill aspect ratio and the accumulated registration tolerance, both of which reduce the annular ring available on the outer layers.

Why does the inner layer registration matter more? Because an inner layer is bonded into the structure during lamination, so a deviation cannot be corrected afterwards.

When is back drilling justified? When the via stub has a measurable effect on the electrical performance at the frequencies in use, and the second drilling operation is worth the improvement.