Stepped Substrate Impedance Matching for Millimetre-Wave Boards

As frequencies move into the millimetre-wave range, board construction stops being uniform. A design may transition from a very thin core to a standard laminate, from one dielectric constant to another, or from a package substrate down onto the board through an interposer. Each of those transitions is a stepped substrate: a point where the cross-section the signal sees changes abruptly in height, permittivity or both.

Treating such a step as a simple mechanical join is what produces the reflection peaks that appear in measurements without any obvious cause in the routing. The step has an electrical model, and once it is modelled it can be matched.

What a Step Does to the Signal

Three effects appear at a step, and they appear at different scales.

The first is a change in characteristic impedance. Impedance depends on the trace geometry and the effective permittivity of the dielectric beneath it. When the dielectric height or its permittivity changes, the impedance changes with it, and the sudden difference between the two sections is a discontinuity of exactly the kind that produces a reflection.

The second is a distributed capacitance at the step itself. The vertical sidewall of the transition presents a small area of copper separated from the reference plane by a short gap, and that geometry is a capacitor. The value is small, but it sits in the signal path, and at high frequency its reactance is not negligible.

And the third is a change of propagation mode. Where a structure is no longer electrically small in all dimensions, energy that was travelling in the intended mode can couple into others, and that conversion shows up as a sharp increase in return loss rather than a smooth degradation.

The magnitudes are instructive. At 60 GHz, a step of only a few tens of micrometres can produce a reflection of the order of a tenth of the signal — a level that no amount of ordinary trace tuning corrects, because the reflection originates at a structure that the trace touches.

Modelling the Step as a Network

The step is best treated as a two-port, or more precisely as a short three-region structure: the transmission line before the step, the discontinuity itself, and the transmission line after it.

Each of the two lines has an impedance that can be calculated from its geometry and material. Those are ordinary calculations and they are reliable. The difficulty is the discontinuity, which is not described by transmission line theory because the structure is no longer uniform. That part needs a full-wave field solution, which extracts an equivalent circuit: typically a shunt capacitance for the sidewall, sometimes with a small series inductance representing the current path along the vertical face.

With that equivalent circuit in hand, the whole step reduces to a small network — a shunt element, a short transmission line, another shunt element. That is a structure for which matching networks can be designed analytically, which is what makes the problem tractable rather than a matter of iteration in the field solver.

What the Match Must Achieve

A matching requirement is stated as a band. The design has a centre frequency and a bandwidth over which the reflection has to stay below some limit and the transmission above another. Both numbers come from the system budget, not from the board: the link has an allowance for loss and for reflection, and the transition consumes part of it.

Specifying the band first is what allows topology to be chosen. A narrow band permits a simple two-element match; a wide band forces a more elaborate structure and more board length. Asking for the widest possible bandwidth without a system requirement produces a longer transition than the design needs.

Four Matching Topologies

The options form a progression from simple and narrow to complex and wide.

A single quarter-wave transformer placed before the step is the simplest. It uses a section of line whose impedance is the geometric mean of the two impedances being joined, and it works well over a modest band. Its weakness is bandwidth: away from the centre frequency the match degrades quickly, and on a wideband system that is a limitation rather than a detail.

Multiple quarter-wave sections, designed so that the reflections from each section cancel across a defined band, widen the match considerably at the cost of length. This is the standard trade: bandwidth bought with board area.

A continuous taper is the third option. Instead of abrupt sections, the impedance is changed gradually along the transition, which spreads the reflection over a long distance where it never accumulates into a large value. A well-designed taper can hold a match across a very wide band, and its length is the price.

The fourth approach compensates the step rather than transforming it. Adding a row of ground vias along the sidewall introduces an inductance that offsets the sidewall capacitance, and a small capacitor applied on the surface provides the final adjustment. Via fence structures of this kind also suppress the parallel-plate modes that a wide transition can excite, which makes them useful even when the impedance match is achieved by other means. This approach stays compact, which is why it is often used where board area is scarce.

Worked Transition

A representative case is a transition from a thin low-permittivity dielectric to a thicker, higher-permittivity laminate beneath it, as happens when a package substrate meets the board in an antenna-in-package design.

Calculated as an abrupt join, the two impedances differ enough to produce a reflection of roughly a tenth of the incident wave, which is visible across the operating band.

The correction used in that case was a two-section transformer split across the transition: one section in the thinner dielectric before the step and one in the thicker material after it, each with an impedance between the two values. Alongside it, a fence of ground vias was placed along the step so that the sidewall capacitance was partly cancelled and the modes were contained. The measured result was a reflection substantially below the unmatched case across a band of more than ten gigahertz, with insertion loss low enough to leave the link budget intact.

Two aspects of that solution generalise. The matching is distributed across the transition rather than placed on one side of it, and the step is treated as part of the channel in simulation from the beginning rather than as an artefact to be explained later.

Process Tolerance and Yield

A matched transition that depends on dimensions has to survive the tolerance those dimensions are built to, and at millimetre-wave frequencies the sensitivity is severe. A dielectric thickness that varies by a few micrometres changes the impedance by a small amount, and the effect on the reflection at 60 GHz is not small: a deviation of a few ohms in impedance can cost several decibels of return loss.

The sidewall angle is the second variable. An etched sidewall is never perfectly vertical, and the angle determines how much capacitance the wall contributes. A wall that leans far from vertical can increase the capacitance substantially, so the match has to be designed against the range of angles the process produces rather than against the nominal geometry. Building a lookup of compensation values against measured angle is a practical way to handle this on a production line.

The third response is to leave adjustability in the design. Reserving an area of copper that can be trimmed, and specifying the shape of the transition so that a small amount of material removal produces a small change in impedance, converts a yield problem into a trimming operation. This is a design decision made at layout time; it cannot be added to a finished board.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/Shengyi-S1190-PCB-1536×640.jpg.webp" alt="ground via fence alongside a stepped board transition” />

Design Checklist

The sequence that avoids rework runs as follows. Establish the geometry and permittivity on both sides of the step and calculate the two impedances. Extract the equivalent circuit of the discontinuity with a full-wave solver rather than estimating it. Choose the matching topology from the required bandwidth and the space available. Reserve the tuning features in the layout while there is still room for them: the compensation vias, the adjustable copper, the area for a tuning component. Simulate the structure across the corners of material and process variation rather than at nominal values. And mark the step region in the fabrication data so that the fabricator understands which areas are critical and which processes are permitted there.

That last point is not administrative. A step region is often also a region where lamination flow, drilling and copper thickness each behave differently, and a fabricator who treats it as ordinary will produce a board that measures differently from the model.

Where This Sits in the Design

A stepped transition is one instance of a general problem: every change in the path a fast signal follows is an impedance event, and the reflection it produces can be calculated from the difference between the two impedances. The relationship between a reflection and the impedance change that causes it is covered in the note on the reflection coefficient and impedance; the broader process of specifying and verifying controlled impedance is described in the guide to impedance control; and the material side of the problem, including what happens to low-loss laminates during pressing, is covered in the article on high-frequency material lamination.

FAQ

Is a stepped transition only a millimetre-wave problem? The effect exists at any frequency, but its consequence grows with the ratio of the step’s electrical size to the wavelength. Below a few gigahertz it is usually absorbed by the link margin; at millimetre waves it dominates.

Can a step be matched with discrete components? Only partly. A capacitor or an inductor can tune the reflected phase, but the mode conversion and the distributed nature of the discontinuity need a geometric solution.

Why model the step separately instead of simulating the entire channel? Because the equivalent circuit shows which element to change. A whole-channel simulation shows that the channel fails, not what to do about it.