EMC Routing Practices for High-Speed PCB Layout
Electromagnetic compatibility is decided by the physical arrangement of the board long before the enclosure is chosen. The layout determines how much energy a signal radiates, how much it picks up from its neighbours, and whether the return current takes a short path or a large loop. Routing practice is therefore the most direct control available, and it costs nothing to apply during layout. The EMC routing measures below are the ones with the largest effect on the finished product.
The common thread is loop area. Every conductor carries a signal current and an equal return current, and the area enclosed between them determines both the magnetic field that escapes and the field that can be coupled in. Reducing loop area is the objective behind most of the rules that follow.
Trace Width and Transient Current
Trace width is chosen initially from the current it must carry, but the width also affects the impedance the conductor presents to a transient. The inductance of a conductor is proportional to its length and inversely proportional to its width, so a narrow trace produces a larger voltage for the same rate of change of current.
Where a signal carries a large transient current, the trace should be as short and as wide as the layout allows. This applies to supply and return paths as much as to signal lines, and it applies particularly to the paths that connect a switching device to its load and to its bypass capacitor, because those currents change fastest. Widening those specific traces often does more for emissions than any other single change.
<img src="https://www.gopcba.com/wp-content/uploads/2024/10/op1.jpg" alt="High speed PCB routing with continuous return path beneath traces” />
Where the layout has space, a woven or grid-like arrangement of supply and return conductors can be used to reduce the inductance of the distribution network, but the same result is achieved more predictably by dedicated planes on a multilayer board.
Component Grouping and Placement
Placement decisions determine how much of the routing problem exists at all. Components that are closely connected should be placed near each other, so that the conductors between them are short. High-speed devices should be positioned where their connections can be kept short, and power devices should be separated from small-signal devices so that the two do not share a return path.
Position also has to serve test and assembly. A layout that is electrically quiet but cannot be probed or repaired will be expensive to support in production. The placement review should therefore confirm that the routing can be short and that the test access survives, rather than trading one against the other.
In high-speed systems, the propagation delay of the interconnections becomes part of the system timing budget, and a general-purpose connection used where a controlled transmission line is required adds delay that reduces the achievable speed. This is a design consideration rather than an EMC one, but both are resolved by the same rule: keep the critical connections short and define their impedance.
High-Speed Routing Rules
Parallel routing reduces the inductance of a conductor, but it also increases the coupling between conductors that run alongside each other. The crosstalk produced by long parallel runs is one of the most common sources of interference on a dense board, so parallel runs should be kept as short as the routing allows, and the spacing between adjacent signal traces should be increased wherever the area permits.
Abrupt changes of direction should be avoided. A sharp corner concentrates the field and produces a local impedance discontinuity, which in turn produces reflection and additional radiation. Curves with a uniform radius, or at minimum consistent 45 degree bends, distribute the change over a longer distance and behave more predictably.
Differential signaling should be used for critical high-speed signals. In a properly routed differential pair, the two conductors carry equal and opposite currents and their fields largely cancel, which reduces both emissions and susceptibility. The benefit only materialises if the pair is routed with constant spacing, constant width, and equal length, and if the return path is continuous beneath it. Any deviation converts part of the differential signal into a common-mode component, which radiates efficiently. The rules for maintaining that symmetry are described in right angle routing and differential traces.
<img src="https://www.gopcba.com/wp-content/uploads/2024/10/55387056_2.webp" alt="Differential pair routing with ground shield traces on a PCB” />
Where a large current device must be connected, it should have its own return path rather than sharing a conductor with low-level signals. A dedicated return path prevents the high-current device from modulating the reference of any other circuit, which is the mechanism that turns a functional board into an intermittent one.
Shielding Between Sensitive Conductors
A grounded conductor placed between two sensitive signal traces reduces the coupling between them, because the shield intercepts the field that would otherwise reach the victim. The shield must be connected to the reference at intervals along its length, since a shield connected at one point only provides a coupling path of its own.
The same technique is used between a sensitive trace and a noisy one, and between a clock line and the signals that run beside it. The shield conductor must be wide enough to be effective and its return path must be continuous. Where a shield would change the impedance of the trace it protects, that change has to be accounted for in the impedance calculation rather than discovered during measurement.
Return Path Continuity
The return path is where most EMC problems originate, because a discontinuity in the reference forces the return current to take a detour. On a multilayer board with a solid plane, the return current flows directly beneath the signal trace, and the loop area is small. When the plane is split, slotted, or interrupted by a connector, the return current must go around the obstacle, and the resulting loop radiates.
Two situations are particularly damaging. The first is a signal routed across a split in the reference plane, which forces a large current loop. The second is a signal that changes layers without a nearby return via, which forces the return current to find its own path between reference planes. Both are corrected at layout time: keep signals away from plane splits, and place a return via next to every signal via at a layer transition.
Connectors and cables extend the same logic off the board. A cable that carries a signal without a defined return conductor forms a large loop that behaves as an antenna, so the return conductor should run alongside the signal, and the connector should provide enough return pins for the signals it carries. Filtering at the connector boundary, before the conductors reach the sensitive circuitry, prevents noise that arrives on the cable from entering the board. The general principles of suppression are described in EMI suppression design principles and in <a href="https://www.gopcba.com/crosstalk-3w-rule/” title=”the 3W crosstalk rule”>the 3W crosstalk rule.
FAQ
Does increasing trace width always reduce emissions? It reduces the impedance of the conductor and therefore the voltage produced by a given transient, which helps for supply and return paths. For a controlled-impedance signal trace, the width is fixed by the impedance requirement, and the emission depends more on the return path and the loop area than on the width.
Why is a return via needed when a signal changes layers? Because the return current travels in the reference plane beneath the signal. If the signal moves to a layer with a different reference, the return current needs a path to the new reference, and a via placed next to the signal via provides it. Without that connection the return current takes a long detour, increasing the loop area.
Is shielding a sensitive trace with a grounded conductor always beneficial? It reduces coupling, but it changes the impedance of the trace and consumes routing space. It should be applied where the coupling is a known problem, and the impedance effect should be included in the design calculation rather than treated as a free addition.



