EMI Control in Digital Circuits: Layout Techniques

Digital circuits are the most common source of electromagnetic interference on a modern board, and they are also the least obvious one. A clock line carries a square wave with fast edges, and a fast edge contains energy at frequencies many times the clock rate itself. What leaves the board is rarely the fundamental; it is the harmonic content of the edge, radiated by whatever loop or cable happens to be the right length to act as an antenna. Controlling it is a matter of understanding three things: the loop area of the current path, the edge rate of the driver and the impedance of the reference.

Why a Digital Circuit Radiates

A signal leaving a driver is accompanied by an equal and opposite return current, and the pair forms a loop. The field radiated by that loop grows with its area and with the square of the frequency, so a small loop carrying a fast edge can radiate more than a large loop carrying a slow one. Measured emissions are almost always produced by loop area rather than by raw current.

Harmonic content explains the frequency distribution. An ideal square wave contains odd harmonics extending without limit, and a real edge rolls off at roughly the inverse of its rise time. A one hundred megahertz clock with a three hundred picosecond edge therefore injects measurable energy at a gigahertz and beyond, which is the band where compliance limits are hardest to meet. Slowing an edge that does not need to be fast is one of the cheapest fixes available.

Return Paths and Reference Continuity

At high frequency the return current does not take the shortest route to the supply; it flows in the plane directly beneath the signal trace, because that path has the lowest impedance. Provide an unbroken reference and the loop area is only the dielectric thickness multiplied by the trace length, which is small. Break the reference and the current detours, and the loop grows to the size of the detour.

That is why a slot, a plane split or a connector that interrupts the reference causes so much trouble. A trace that crosses a split in its reference plane radiates strongly and is also more susceptible to incoming fields, so the same defect appears on both the emissions and the immunity side of a compliance report. Our notes on EMC and EMI control in PCB design cover the wider picture.

Decoupling and the Supply Loop

A decoupling capacitor exists to supply the transient current a device needs before the supply network can respond, and in doing so it keeps that current out of the planes. Its value matters less than its placement: a capacitor connected by two long thin traces has enough inductance that it is ineffective at the frequencies that cause emissions, while a small part placed directly against the pin and returned through a via to the plane works as intended.

The capacitor loop itself also radiates. The area enclosed by the capacitor, its traces and its return path should be as small as the layout allows, which means placing the part on the same side of the board as the pin and dropping the return via immediately next to the pad. On high pin count devices, a distributed ring of small capacitors around the package outperforms a few large ones placed at one end.

Clock and Switching Node Treatment

Clocks deserve special treatment because they are periodic and therefore concentrate energy at specific frequencies that are easy to measure and hard to hide. Keep clock traces short, route them over a solid reference, and keep them away from board edges and connectors where their field can couple into a cable. Series termination at the source slows the edge and reduces the harmonic content at the same time as it controls reflections.

Switching regulators are the other concentrated source. The loop formed by the input capacitor, the high side switch and the ground return carries current that switches in nanoseconds, and its area determines how much field escapes. Keeping that loop physically tiny is the single most effective measure on a power stage. Our notes on DC-DC converter layout describe the geometry.

Stackup, Shielding and Connector Treatment

The stackup does much of the work before any trace is routed. Placing every high speed signal layer adjacent to a solid plane contains the field, and keeping at least one plane pair unbroken provides a low impedance reference for the whole board. A board designed this way radiates less at the same clock rate than one where signals are sandwiched between other signals with no reference.

Connectors are where internal noise becomes external. Any signal that reaches a connector can be carried out onto a cable, which is a far better antenna than a trace. Filter or terminate the signals that leave, keep the return path adjacent to each one, and connect the cable shield to the chassis with a low impedance bond rather than a long pigtail.

Verification and Iteration

Pre-compliance measurement with a near field probe answers the important question quickly: where is the energy coming from. Sweeping a probe across a powered board with a spectrum analyser shows which area radiates at which frequency, and correlating the peaks with the clock harmonics usually identifies the source without a chamber visit.

The fixes are then usually geometric. Shorten a loop, restore a reference plane, move a connector, add stitching, or slow an edge that did not need to be fast. Our notes on ground current and harmonic distortion and multilayer boards for high speed design describe the mechanisms behind those changes.

FAQ

Which net is usually the worst emitter? The fastest periodic signal, which is normally the clock or a strobe. Its harmonics extend highest and it repeats continuously, so it dominates the measured spectrum at the frequencies that matter.

Does a slower clock always reduce emissions? Not necessarily. Emissions depend on edge rate more than on clock frequency, so a slow clock with a very fast driver can radiate more than a faster clock with a controlled edge.

Is shielding the answer? Shielding is a last resort. It adds cost and weight and does nothing about the source, and a board with correct return paths usually passes without it.

Rules to Fix Before Routing Starts

Most of the benefit is captured by a short list of rules that are applied at the stackup and placement stage. Put every high speed signal layer next to a solid plane. Make sure no trace crosses a plane split or a return path gap. Keep switching loops below a stated area, measured on the board rather than estimated. Give every connector pin that leaves the enclosure a defined return, and place its filter or series element at the connector rather than at the driver.

Then add the two rules that are easiest to forget. Stitch unconnected copper to the reference at a defined spacing so that it cannot act as a floating resonator, and keep the board edge clear of fast traces, because a trace running along an edge couples into whatever is beside the product and radiates from an unshielded boundary. Reviewing these points with a checklist before release catches nearly all of the geometry that would otherwise be found in a chamber.