EMC and EMI Control in PCB Design: Practical Rules

Electromagnetic compatibility is rarely decided by a single component. It is decided by the shape of the current paths on the board, and those paths are laid out long before anyone runs a compliance test. Every signal that leaves a driver returns to it, and the area enclosed by that round trip is the antenna that radiates and the loop that picks up interference. Good EMI control is therefore mostly a matter of knowing where the return current flows and making that path short, wide and predictable.

Think in Terms of Loops

The radiation from a trace is proportional to the loop area and to the square of the frequency, so a small loop carrying a fast edge radiates more than a large loop carrying a slow one. The forward path is the trace the designer drew; the return path is the one nobody drew, which follows the reference plane beneath the trace at high frequency rather than taking the shortest route to ground.

That behaviour is the key to most layout decisions. A trace above a continuous ground plane has a return current directly underneath it, so the loop area is only the dielectric thickness multiplied by the trace length. Break the plane with a slot and the return current has to detour around it, and the loop suddenly becomes as large as the detour. Loop area is the parameter to control, not just trace length.

Stackup and Plane Strategy

A multilayer board with solid reference planes is the single most effective EMC measure available, because it gives every high speed signal a return path directly beneath it. Placing signal layers adjacent to planes, and keeping at least one plane pair solid and unbroken, keeps the loop area small across the whole design rather than only on the nets that were considered carefully.

Where a plane must be split, the split belongs under a slow or quiet area, never under a fast bus. Signals crossing a split in their reference plane create a large loop and are a classic cause of failed emissions testing. Our notes on multilayer boards for high speed design describe how the layer order supports this.

Clock and Switching Nodes

Clocks and switching regulators are the usual sources. A clock trace is a periodic signal with fast edges, so it radiates at the clock frequency and at every harmonic that the edge contains, and a switching node on a power supply is a small area driven with a large voltage step. Both need to be treated as radiators rather than as ordinary nets.

Keep clock traces short, keep them over a solid reference, and keep them away from board edges and connector areas where their field can couple into a cable. On a switching regulator, keep the input capacitor loop and the switching node as small as physically possible, because those two loops carry the high di/dt current. Our notes on DC-DC converter layout cover that geometry in detail.

Interfaces, Cables and Connectors

Cables are the most efficient antennas on most products, because they are long and they leave the enclosure. Anything that reaches a connector can be carried out onto the cable, so the region around a connector deserves the strictest layout discipline: filter or terminate the signals that leave, keep the return path for each cable signal adjacent to it, and provide a low impedance connection between the cable shield and the chassis.

Where a board has an external interface, the usual measures are a series resistor or ferrite bead close to the connector, a capacitor to a quiet reference, and a protective device for transients. Place them at the connector rather than at the driver, so that the noisy trace is short and the filtered trace is the long one. Our notes on routing high frequency data buses cover the trace side of the same problem.

Filtering and Decoupling

Decoupling capacitors supply the transient current a device needs, and in doing so they keep that current out of the planes. Their value is less important than their placement and their loop: a capacitor connected by two long thin traces has enough inductance to make it useless at the frequencies that matter, whereas a small part placed directly against the pin and returned through a via to the plane works as intended.

Filtering at a boundary works the same way. A filter is only as good as the impedance of the ground it refers to, so a ferrite bead or a capacitor returned to a noisy ground injects the noise it was meant to remove straight into the reference. Filtering and grounding have to be designed together, and the reference for each filter should be the quiet side of the boundary.

Grounding Between Sections

Analogue, digital and power sections need a reference that all three share, and the way that reference is arranged decides whether the design is quiet. A single solid ground plane, with components placed so that their return currents do not flow through each other, is generally better than a plane divided into separate islands that must then be joined.

Splitting has its place, particularly under a mixed signal converter where a defined boundary prevents digital return current from crossing the analogue area, but it must be done deliberately with a single joining point. An accidental split, created by a slot in a plane or by a via fence in the wrong place, forces return current to detour and creates the very loop area the layout was trying to avoid. Our notes on ground current and harmonic distortion explain the mechanism.

Design Rule Checks and Review

The measures above can be turned into a checklist that the layout can be tested against, and that is how experienced teams keep control of EMC design rules across a large design. Typical checks include: every high speed net has a continuous reference; no trace crosses a plane split; every connector pin that leaves the board has a defined return; every switching loop is below a stated area; and every unconnected copper area is stitched to the plane with vias at a defined spacing.

Automated checks catch the geometric rules, and a peer review catches the ones a tool cannot see, such as a connector placed so that its signals run past a noisy regulator. Running the review before the layout is released is far cheaper than discovering the problem in a chamber, where a fix usually means a board revision and a new tooling charge. Our notes on mixed signal design guidelines give a starting set of rules for boards that carry both domains.

Measuring and Fixing Emissions

Pre-compliance measurement with a near field probe and a spectrum analyser can be done on a bench and localises the source quickly. Sweeping a probe across a powered board shows which area radiates at which frequency, and correlating the peaks with the clock harmonics usually identifies the culprit without a chamber visit.

Once the source is known, the fixes are usually geometric rather than component based: shorten a loop, restore a reference plane, move a connector, add stitching, or slow an edge that did not need to be fast. Series termination on a clock or a slower slew rate setting on a driver often solves a problem that no amount of shielding would have fixed economically.

FAQ

Is a ground plane enough for EMC? A solid reference plane solves most of the loop area problem, but it does not help if signals cross a split, if cables carry noise out of the enclosure or if a switching loop is large. The plane is the foundation rather than the whole answer.

Should analogue and digital grounds be separated? Usually not into isolated islands. A single plane with controlled component placement keeps the reference continuous; where a split is required, it should have one defined joining point and no traces crossing it.

When should EMC be considered in a project? At the stackup and placement stage. Filtering components, connector placement and plane strategy are all decided early, and retrofitting them after a failed test is the most expensive way to solve the problem.