Thermal Via Design and Copper Spreading Under Power Devices

A power device converts a fraction of its current into heat, and that heat has to leave the package through the board or through a heat sink. Where the primary path is the board, the design of the copper beneath the pad decides the device’s operating temperature, its efficiency, and ultimately its life. Thermal vias and copper spreading are the two tools that make that path effective.

Why Heat Needs a Path Out

Junction temperature is what limits a semiconductor. Every thermal resistance between the junction and the ambient air adds to the total, and the board is usually the largest single contributor in a surface-mount design. If that path is poor, the device runs hot regardless of how generously the silicon was rated.

Heat leaves the package by conduction into the copper beneath, then spreads laterally and vertically through the board, and finally transfers to the air or to an attached heat sink. Improving any stage reduces the junction temperature, but the first stage, from the pad into the board, is the one the layout engineer controls most directly. It is also the cheapest stage to improve, because it depends on copper geometry rather than on an added component.

Copper Spreading and Effective Area

Copper is an excellent conductor in the plane of the board and a poor one through its thickness. Once heat enters the copper under a pad, it spreads laterally, and the effective spreading area is much larger than the pad itself. A generous copper area therefore lowers the local temperature more than its thickness alone would suggest.

Spreading follows an approximately radial pattern, so the benefit diminishes with distance from the source. Practical designs use a copper pour or a wide polygon under the device, connected to additional copper on other layers, and avoid narrow necks that constrict the flow. The shape matters as much as the total area.

Thermal Via Geometry and Array Layout

Thermal vias conduct heat through the board thickness to copper on the opposite side or to an internal plane. Their thermal resistance depends on the barrel’s cross-sectional area, the plating thickness, and the number in the array. Many small vias generally outperform a few large ones because they distribute the flow and reduce the distance heat must travel laterally before entering a barrel.

Spacing should be tight enough to place vias under the whole pad without compromising the mechanical strength of the area, and the pattern is usually a grid with uniform pitch. Vias placed directly under the centre of a large pad are the most valuable, because that is where the temperature is highest and the lateral path is longest.

Filled Versus Open Thermal Vias

An open via beneath a solder pad wicks paste away during reflow, leaving voids and reducing the contact area exactly where the thermal path matters most. This is why thermal vias under a power pad are normally plugged or filled and then capped, producing a flat, solderable surface with a continuous copper path.

Filling also prevents flux and cleaning chemistry from being trapped in the barrel, which would otherwise outgas during later thermal cycles. The added process cost is justified wherever the via is inside a solder land, and the design drawing should state clearly which vias are filled and which remain open.

Interface Materials and the Heat Sink

Between the board and a heat sink, or between the device and its pad, a thermal interface material fills the microscopic air gaps that would otherwise dominate the resistance. Thermal pads, dispensable gap fillers, and phase change materials each suit different pressures and gap heights, and the choice affects both performance and assembly.

The mounting method matters as much as the material. Uneven pressure creates thick and thin regions, and excessive force can crack a ceramic package or flex the board. Where the board itself is the heat sink, the interface is the solder joint, which is another reason to control voiding under the pad.

Thermal Resistance: A Simple Model

A first-order estimate adds the resistances in series: junction to case, case to board through the solder, board through the vias and copper, and finally board to ambient. Each term can be estimated from geometry and material data, and the sum gives a rough junction temperature that is adequate for early design decisions.

The model is only a guide, because spreading is not one-dimensional and the ambient is rarely uniform. It is nevertheless useful for comparing options: doubling the via count, adding a copper plane, or changing the interface material each produces a predictable change in one term, which makes the trade-offs visible.

Measurement and Simulation

Simulation with a finite element or computational fluid dynamics tool gives a detailed picture before the board is built, provided that the boundary conditions are realistic. Assumed convection coefficients and neglected neighbouring components are the usual sources of error, so results should be treated as comparative rather than absolute.

Measurement validates the model. A thermocouple on the package, a thermal camera image of the board, and a known power dissipation together produce the actual thermal resistance. Testing at the worst-case ambient temperature and load, rather than at a convenient bench condition, is what makes the result meaningful.

Layout Mistakes That Trap Heat

Common errors include restricting the copper to the exact pad outline, placing thermal vias only at the perimeter of a large pad, and running signal traces that cut through the spreading area. A plane split directly beneath the device is equally damaging, because it interrupts the vertical path that the vias were meant to use.

Another frequent mistake is thermal relief on the very vias intended to conduct heat. Relief spokes reduce the connection area and add resistance, which is acceptable for a soldering consideration but counterproductive under a power device that depends on that path. Where both requirements exist, they should be resolved deliberately.

Design Rules and Verification

The rules that matter can be written simply: define the copper area under each power device, specify the via count and pitch, require filled and capped vias inside solder lands, and keep planes continuous beneath the thermal path. Adding the expected power dissipation to the assembly drawing gives the fabricator and the assembly house the context they need.

Verification combines thermal measurement on the first article with a check that the fabricated board matches the design: via count, fill, copper area, and plating. A thermal image of the operating board at rated load shows immediately whether the path performs as intended, and provides a baseline for comparing future revisions. Keeping that image with the design record turns the next revision into a comparison rather than a fresh experiment.

FAQ

How many thermal vias do I need under a power pad? There is no fixed number, because the requirement depends on the power, the copper area, the board thickness, and the acceptable junction temperature. Start with a uniform grid that covers the pad, estimate the resulting thermal resistance, and confirm with a measurement on the first article.

Should thermal vias be plated shut or left open? Inside a solder land they should be filled and capped, otherwise paste drains into the barrels and creates voids that raise the thermal resistance. Open vias are acceptable only where they are outside the solder area and are not required to conduct heat away from a joint.

Is a thicker copper layer always better for thermal performance? Thicker copper helps by spreading heat laterally and by reducing the resistance of the vias, but the improvement is not proportional to cost. Where the path through the board is already good, adding copper thickness yields less than improving the interface or the heat sink.