Copper Surface Roughness and Its Effect on Signal Loss

At low frequencies the surface of a copper trace can be rough without consequence, because the current uses the whole cross section of the conductor. As the frequency rises the current crowds into a thin layer at the surface, and that layer follows every peak and valley of the foil. A rough surface therefore makes the conductor electrically longer than it looks, and the extra loss appears as attenuation in the channel. This article explains the mechanism, how surface roughness is specified, and how to keep the penalty under control. It is one of the few loss contributors that is decided by the choice of foil rather than by the layout.

Why Roughness Matters at High Frequency

The current in a conductor is not distributed uniformly. At high frequency it concentrates near the surface, and the depth of that concentration shrinks as frequency rises. Once the skin depth is smaller than the peak to valley amplitude of the copper surface, the current has to travel up and over each asperity instead of along a smooth line.

The effect is an increase in the effective path length and in the effective resistance, which shows up as insertion loss that is higher than a smooth conductor model predicts. The effect grows with frequency, so a channel that is acceptable at one gigabit can fail at ten. The increase is not linear, which is why a design can pass at one data rate and fail at the next with no other change.

Skin Effect and Where the Current Flows

The skin depth in copper at a given frequency is a material property, and it is the yardstick for judging whether roughness is significant. If the skin depth is much larger than the surface profile, the current samples the average of the peaks and valleys and the roughness penalty is small. If it is comparable to or smaller than the profile amplitude, the penalty becomes substantial.

This is why the same foil behaves differently in different products. A design running at a modest data rate may never notice the profile, while a millimetre wave or high speed digital design on the same stack up has to account for it explicitly. Where the surface roughness is comparable to the skin depth, the foil becomes part of the electrical design rather than a mechanical detail.

<img src="https://www.gopcba.com/wp-content/uploads/2024/09/Automotive_PCBs.webp" alt="Copper foil surface profile under magnification” />

How Foil Roughness Is Measured

Roughness is normally reported as an average deviation from the mean line, and the profile is described by more than one parameter because a surface can have a similar average with a very different shape. A treatment that produces tall, widely spaced spikes affects the loss differently from one that produces a dense, shallow texture. Two foils with the same average figure can therefore produce measurably different loss.

The measurement is taken on the foil as supplied and again after lamination, because the bonding treatment and the pressing change the profile. A figure quoted for the raw foil is not directly comparable with one measured on a finished trace, and the two should not be mixed in a loss model.

Foil Types and Their Profiles

Standard electrodeposited copper foil has a rough matte side that is designed to grip the laminate. The treatment gives excellent adhesion and a profile that is unfriendly at high frequency. Rolled and annealed foil has a much smoother surface, which reduces the loss but costs more and is available in a narrower range of thicknesses.

Between the two sit the low profile and very low profile foils, which use a finer treatment to achieve adequate adhesion with a shallower profile. They are the usual choice for high frequency digital and for radio frequency work, and the choice is a trade between loss, adhesion and cost. The available thickness also changes with the foil type, which alters the conductor cross section and therefore the resistance.

Oxide Treatment and Bonding Enhancement

Adhesion to the laminate comes from mechanical keying and from the chemistry of the treatment. A smoother foil has less mechanical keying, so the treatment chemistry and the oxide layer have to carry more of the load. That is why a smooth foil can be more sensitive to a lamination process that has drifted.

Our etching notes describe how the copper surface is prepared and patterned, and our laminate properties guide covers how the resin system interacts with the foil treatment.

Modelling Roughness in Loss Calculations

Loss models handle roughness with a correction factor applied to the conductor loss, and the factor is derived from the measured profile. Using a default factor instead of the actual foil data is a common source of a design that simulates well and measures badly.

The correction also has to be applied to the right surface. In a stripline the signal sees the foil treatment on both sides, while in a microstrip the field distribution is asymmetric and the ground plane roughness can dominate. The model should reflect the actual stack up rather than a generic assumption. Applying a correction to the wrong surface can over or under estimate the loss by a wide margin.

Laminate and Foil Combinations

Loss has two parts, the conductor loss and the dielectric loss, and the balance between them depends on the material and the geometry. In a low loss laminate the conductor loss becomes the larger share, so the foil choice matters more. In a standard FR-4 at a high data rate the dielectric loss dominates and the foil choice has less influence.

That interaction is why foil selection cannot be made independently of the laminate. Our high frequency laminate guide covers how the materials are selected for loss controlled designs.

Measuring Loss on a Test Coupon

A test coupon with controlled impedance lines lets the design be verified on the actual stack up rather than on a model. The coupon should use the same foil and the same laminate as the product, and it should be measured with the same method that the specification will use.

Our test coupon notes describe how the coupon is laid out and routed on the panel, so that a measurement taken on a coupon represents the boards built beside it.

Design Choices That Limit the Penalty

Where the loss budget is tight, the levers are the foil type, the trace width and the dielectric thickness. A wider trace reduces the conductor resistance and the current density at the surface, and a thicker dielectric reduces the dielectric loss. Both changes cost board area, so the trade is made against the routing density. The stack up should be reviewed whenever the data rate changes, because a foil that was adequate at one rate may not be at the next.

At gopcb the foil and laminate combination is recorded with the stack up and reported in the quality documentation for the board, so that a repeat order can be built with the same loss behaviour as the qualification build.

FAQ

Does roughness matter at a few hundred megahertz? Usually very little, because the skin depth is much larger than the profile. The penalty grows quickly as the frequency rises and becomes significant when the skin depth approaches the roughness amplitude.

Is a smoother foil always better? For loss it is, but smoother foil also has less mechanical keying to the laminate and costs more. The choice should be made against the loss budget and the reliability requirement together.

Can the roughness penalty be corrected after the board is built? No. It is a property of the foil and the lamination, so it has to be selected at the start. A board built with the wrong foil cannot be recovered by a process change.