DAC Output Filter Circuit Design

A digital to analog converter produces a staircase rather than a smooth waveform, and the steps carry energy at the update rate and its harmonics. The output filter removes those images and smooths the steps, and its design follows from the update rate and the bandwidth required.

What the Output Contains

The wanted signal occupies the band up to half the update rate, and its mirror image appears above it, centred on the update rate. The image is an artefact of sampling and it has to be removed before the signal is used.

The converter also produces a glitch at every code change, because the internal switches do not all change at the same instant. Its amplitude is specified in nanovolt seconds and it appears as a spike on the output.

Beyond the images, there is the quantisation noise of the converter itself and the noise of the reference. Both set a floor that the filter cannot remove because they are inside the band.

reconstruction filter Requirements

A reconstruction filter passes the signal band and rejects the images. Its corner is placed above the highest signal frequency and well below the update rate, and the ratio between the two sets the order required.

A single pole gives twenty decibels per decade, and where the update rate is only a few times the signal bandwidth the image is close to the band and a steeper filter is needed. A second or third order Sallen and Key section is the usual answer.

The filter also has to be flat in the pass band. A filter with a corner close to the highest signal frequency attenuates the top of the band, and the error is a fixed gain error that a calibration does not correct because it varies with frequency.

settling time and update rate

settling time is the time the output takes to reach its new value within a specified error after an update. It is set by the converter, the buffer and the filter together, and it limits the update rate that can be used.

An update that arrives before the previous one has settled produces an output that never reaches the correct value and a distortion that depends on the previous codes. The settling specification has to be met for the full scale step, which is the worst case.

A filter with a low corner slows the settling, so the filter and the update rate are chosen together. Doubling the update rate to get a smoother waveform may simply expose the settling limit.

Glitch and Its Suppression

The glitch is worst at the major carry, where many bits change at once. Its energy is small and its amplitude is large, which makes it troublesome in a system that responds to fast edges.

A sample and hold amplifier after the converter removes the glitch, because the output is captured after the settling and held while the converter changes. Where the update rate is low this is the cleanest solution.

A low pass filter also removes the glitch, and it does so at the cost of slowing the response. The choice depends on whether the receiver is sensitive to the spike or to the delay.

The Output Buffer

The converter output impedance is not zero and it is code dependent, so a buffer is placed after it in most designs. The buffer presents a constant load to the converter and a low impedance to the filter.

The buffer has to be fast enough to settle within the update period and its own settling has to be monotonic. An amplifier that overshoots and rings takes longer to reach the final value than one that is more heavily compensated.

A rail to rail output stage is convenient and its crossover region can produce a small distortion at the middle of the output range. Where the output crosses that region often, a different amplifier or a small bias current is used.

Reference and Gain

The output range is set by the reference, so its accuracy and drift appear directly in the output. A reference with a stable temperature coefficient is as important here as it is in an analog to digital converter.

Where the output has to cover a range larger than the reference, an amplifier with gain follows the filter. The gain stage adds its own offset and drift, and it is usually placed before the filter so that the filter works at a higher signal level.

A bipolar output requires a negative supply or an offset. An offset shifts the whole range and halves the available swing, which is the price of a single supply design.

Layout and Decoupling

Place the converter, the buffer and the first filter section close together, and keep the analog supply decoupled at each. The output of a converter changes at the update rate, and the current it draws from the supply is modulated with the code.

Keep the digital interface away from the output filter. The clock and the data lines switch at the update rate and carry current in the digital ground, and a shared return with the analog section puts that current into the output.

The ground of the filter capacitors should be the analog ground, and the connection to the digital ground should be at one point. The layout measures that achieve this are described in our guide to mixed signal board design.

Filter Topologies

A Sallen and Key section with a unity gain buffer gives a second order response from two resistors and two capacitors. Its component tolerances set both the corner and the Q, which is why one percent parts are used rather than five.

A multiple feedback topology inverts the signal and gives a similar response with fewer parts in some configurations. It loads the source more heavily, which is harmless after a buffer and awkward directly at a converter output.

Higher order filters are built by cascading sections, and each section is designed so that the combined response is flat. Cascading two identical sections does not give a Butterworth response, and assuming that it does is a common and quiet mistake.

Verification and Faults

Verify the output with a spectrum analyser while the converter is producing a sine wave. The images should be below the specification in the band of interest, and their position confirms the update rate that was actually used.

Measure the settling with a full scale step and an oscilloscope. A step that takes longer than the update period indicates that the buffer or the filter is too slow for the rate.

An output that is correct on a slow meter and distorted on a fast one is a settling problem rather than a filter problem. The release checks that keep such a channel consistent are collected in our PCB design release checklist, the assembly points in judging PCB quality, and the means of keeping a mixed signal board quiet in our guide to EMI suppression design principles.

FAQ

How steep does a reconstruction filter need to be? Steep enough to suppress the images below the requirement. A single pole is rarely enough when the update rate is low.

What causes the spike at every code change? The glitch of the converter, where the internal switches change at different instants. A sample and hold or a filter removes it.

Why is my output slow to settle? The filter corner is too low or the buffer is not fast enough for the update rate.