Embedded Copper Coin PCB Design in 5G Base Station Power Amplifier Heat Dissipation

5G base station RF power amplifier modules, or PA, experience significant junction temperature rise under high-frequency and high-power operating conditions. Typical GaN HEMT devices can exceed 150 degrees Celsius junction temperature at 3.5 GHz band and 30 W output power. Insufficient heat dissipation design will lead to gain compression, phase distortion, reliability degradation, and even thermal failure. Traditional FR-4 multilayer boards plus metal housing have long thermal conduction paths and high interface thermal resistance, typically greater than 1.2 K per W, making it difficult to meet the strict requirement of PA unit case temperature of 85 degrees Celsius or less in 5G Massive MIMO AAU. Against this background, embedded copper coin technology has become a key solution for thermal management of high-density RF PCB due to its extremely low vertical thermal resistance path and excellent planar temperature uniformity.

Embedded Copper Coin PCB
Embedded Copper Coin PCB

Structural Principle and Material Selection of Embedded Copper Coin

Embedded copper coin is not simply attaching copper foil to the PCB surface. It embeds a high-purity oxygen-free copper prefabricated block, or OFC with 99.99 percent Cu or more, completely into a preset groove in the inner core board through processes such as precision milling, cleaning and activation, vacuum lamination, and resin filling and curing, so that its upper surface achieves atomic-level coplanarity with the surrounding dielectric layer. Typical embedded copper coin thickness is 1.2 to 2.0 mm. The planar size is optimized according to PA chip size and heat flux density, commonly 8 mm by 8 mm to 15 mm by 15 mm. Copper purity directly affects thermal conductivity. 99.99 percent Cu has a thermal conductivity of 401 W per meter Kelvin at 25 degrees Celsius, more than 8 times that of conventional 63/37 tin-lead solder at 50 W per meter Kelvin. Special attention must be paid to the edge chamfer design of the copper coin, with R0.1 to R0.2 mm, to avoid microcracks in the dielectric layer caused by stress concentration during lamination. At the same time, modified epoxy resin or PPE-based prepreg with low CTE of less than 12 ppm per degree Celsius and high Tg of 180 degrees Celsius or more should be selected to ensure copper and dielectric interface shear strength greater than 8 MPa under thermal cycling.

Thermal Path Modeling and Measurement Verification

FloTHERM is used to establish a three-dimensional transient thermal model to compare traditional solutions and embedded copper coin solutions. When PA chip of 3 mm by 3 mm has a thermal power of 25 W, the traditional FR-4 plus 6 oz copper solution has a junction-to-ambient thermal resistance, or R theta JA, of 18.6 K per W. With a 1.5 mm thick embedded copper coin with upper surface flush with the top signal layer, plus 20 oz back copper, plus forced air cooling at 3 m per second, R theta JA drops to 6.3 K per W, a reduction of 66 percent. In actual measurement, an infrared thermal imager with accuracy of plus or minus 1.5 degrees Celsius is used for steady-state testing of mass production boards. At 40 degrees Celsius ambient temperature, the surface temperature gradient in the embedded copper coin area is less than 2.1 degrees Celsius per cm, far better than 14.7 degrees Celsius per cm in the surrounding FR-4 area, confirming its excellent lateral heat diffusion capability. X-ray tomography shows no voids at the interface between the copper coin and surrounding PP material. Combined with SEM-EDS analysis, obvious Cu-O bonding peaks at the interface confirm strong bonding dominated by chemical bonding.

Embedded Copper Coin PCB
Embedded Copper Coin PCB

Core Process Difficulties in Lamination Coplanarity Control

The key to the success of embedded copper coin technology lies in the coplanarity between the upper surface of the copper coin and the adjacent dielectric layer after lamination. The industry requirement is plus or minus 15 micrometers or less under IPC-6012 Class 3. Exceeding the deviation will cause subsequent microstrip impedance mutation with delta Z greater than 5 ohms, poor pad soldering, or uneven BGA ball placement. The main influencing factors include: first, copper coin thickness tolerance, which needs to be controlled within plus or minus 5 micrometers and depends on precision grinding; second, PP flow filling behavior, where high fluidity PP easily causes the copper coin to float up, and low fluidity causes insufficient glue at the interface; third, lamination parameter matching, where a heating rate greater than 2.5 degrees Celsius per minute easily causes PP explosive polymerization, and uneven pressure gradient can be reduced by stepped pressure increase of 50 psi to 150 psi to 300 psi to reduce copper coin displacement. A leading manufacturer introduced an online laser confocal distance measurement system with a sampling rate of 1 kHz, installed four-point real-time monitoring on the hot pressing plate of the lamination machine, and dynamically fed back to adjust local pressure, increasing the batch CPK value from 0.82 to 1.67.

Key Points of Signal Integrity Collaborative Design

Although embedded copper coin improves heat dissipation, its high conductivity disturbs the RF field distribution. In the 3.5 GHz band, if the copper coin is not treated with electromagnetic shielding, it will increase the insertion loss of adjacent 50 ohm microstrip lines by 0.3 dB per 10 mm and induce about 2.8 dB return loss deterioration. Solutions include etching a grounded guard ring on the sidewall of the copper coin, with a slot width of 0.3 mm and depth to the bottom of the copper coin, connecting all ground layers. A 0.1 mm thick FR-4 dielectric layer is covered directly above the copper coin and covered with 2 oz copper as a shielding layer. This layer is tightly connected to the main ground plane through 12 or more PTH holes with a diameter of 0.2 mm and copper plating thickness of 25 micrometers or more. HFSS simulation shows that this structure controls the characteristic impedance fluctuation of the microstrip line within plus or minus 1.2 ohms, meeting the plus or minus 2.5 ohm tolerance requirement of the 5G NR FR1 band. In addition, the copper coin body must strictly avoid forming parallel coupling with RF traces. The minimum spacing is set according to the 3W principle, where W is line width. For example, a 4 mil line width corresponds to a minimum spacing of 12 mil.

Mass Production Reliability Verification and Failure Modes

Accelerated tests are conducted on embedded copper coin PCB according to JEDEC JESD22-A104 thermal cycling from minus 40 to plus 125 degrees Celsius for 1,000 cycles and JEDEC JESD22-A108 high temperature and high humidity at 85 degrees Celsius and 85 percent RH for 1,000 hours. Failure analysis found that early batches showed PP delamination at the copper coin edge, accounting for 72 percent of total failures. The root cause was that PP moisture content greater than 0.05 percent caused water vapor expansion during lamination. Improvement measures include PP vacuum baking at 125 degrees Celsius for 8 hours and copper coin surface plasma cleaning with Ar and O2 mixed gas at 150 W power. After optimization, the delamination length after 1,000 thermal cycles is less than 50 micrometers, meeting IPC-A-600G Class 3 acceptance, and no copper coin warping is observed under minus 40 degrees Celsius low temperature shock, with maximum deformation less than 3 micrometers. After long-term aging testing at 85 degrees Celsius and 85 percent RH for 1,000 hours, the shear strength retention rate of the copper coin and PP interface is greater than 94 percent, proving that the chemical bonding structure has engineering-grade reliability.

Cost and Manufacturing Feasibility Balance Strategy

The cost of embedded copper coin single board increases by about 18 to 22 percent compared with traditional solutions, mainly due to copper material cost at 45 percent, precision milling at 28 percent, and lamination yield control at 15 percent. To control cost, a partitioned copper embedding strategy is recommended. Only embed copper coins directly below the PA chip and in the first stage matching circuit area, while maintaining conventional copper coverage in other areas. At the same time, reduce the copper coin thickness from 2.0 mm to 1.5 mm, reducing cost by 12 percent while thermal resistance only increases by 0.9 K per W. A certain 5G AAU manufacturer, by building a joint laboratory with a PCB factory, tightened copper coin tolerance control from plus or minus 8 micrometers to plus or minus 4 micrometers and shared the lamination curve database, increasing mass production first pass yield from 92.3 percent to 98.6 percent and reducing unit cost by 9.4 percent. Practice shows that embedded copper coin technology has a foundation for large-scale commercial use, and its comprehensive TCO, or total cost of ownership, is superior to alternative solutions such as liquid cooling in base station equipment with a life cycle of more than 5 years.

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