Stackup Verification: Reading the Drawing Before the Drill

Stackup verification is the check that the drawing, the material list and the drill data describe the same board. It happens before the first panel is laminated, and it is the last point at which a mistake costs a review rather than a rebuild. It is also the only review that sees the material list and the drill file at the same time.

Two kinds of error survive a normal design review. The first is arithmetic, because the dielectric thicknesses may not add up to the impedance target or to the finished board thickness. The second is consistency, because the drill data, the pad sizes and the copper weights were updated at different times and no longer agree.

What the Stackup Drawing Has to State

A usable drawing lists every layer in order with the material, the copper weight and the dielectric thickness of each, plus the tolerance that applies. It also states the finished board thickness, the surface finish, the solder mask thickness over copper and the target impedance for each controlled layer.

Where a value is omitted the shop supplies a default, and the default rarely matches what the design was simulated with. Solder mask thickness over a controlled trace is the omission that causes the most surprise, because it changes the effective dielectric constant of the outer layer.

Total Thickness and Its Tolerance

Finished thickness is built from foil, prepreg, cores and plating, and each contributes its own variation. A 1.6 mm board is normally quoted with a tolerance of plus or minus 10 percent, and a design that assumes a tighter figure has to pay for tighter prepreg and a controlled press cycle. Thickness is measured at several points across the panel, because a press cycle can leave the centre thicker than the edges.

The check is a simple addition, but it has to include the plating, the solder mask and the finish, and it has to be done for the laminate supplier actually being used. The same nominal stack built from a different prepreg grade can finish outside the band, which is the subject of the notes on board thickness tolerance.

Dielectric Thickness Against the Impedance Target

Impedance is set by trace width, copper thickness and the dielectric above and below the trace, so a change of one prepreg ply moves the impedance by several ohms. The usual specification is plus or minus 10 percent, with plus or minus 5 percent reserved for radio frequency work. The coupon carrying the test structure has to be built with the same prepreg plies as the product, or the result describes the coupon rather than the board.

Verification therefore means recalculating each controlled layer from the materials that will actually be used and comparing the result with the target. The tolerance on the dielectric is what the shop can hold rather than what the field solver assumed, and that gap is the reason impedance control is a fabrication tolerance, as explained in the notes on impedance tolerance and stackup.

Copper Weight and Finished Copper

Copper weight on the drawing refers to the foil as supplied, while the copper on the finished board is thicker wherever plating has been added. A one ounce foil becomes roughly 40 to 60 um on an outer layer after plating, while an inner layer stays close to its nominal thickness. The foil weight on the drawing is therefore a starting point rather than a finished dimension.

That difference matters for impedance, for current capacity and for etching. A controlled impedance outer trace has to be calculated with the finished copper, and a heavy inner layer has to be checked against the minimum line width the etcher can produce before the stackup is released.

Drill Data Against the Drawing

The drill file, the pad sizes and the annular ring have to agree with the stackup, and they are usually produced by different tools. A pad that was reduced to gain routing space can leave a ring below the minimum once the drill tolerance is applied.

Checking the smallest ring on each layer catches most problems and is faster than reviewing every pad. The rule is that the nominal ring, minus the drill tolerance and the layer-to-layer registration, must still be above the minimum for the class of product, which is the calculation described in the notes on drill registration.

<img src="https://www.gopcba.com/wp-content/uploads/2026/09/206-1.jpg" alt="Impedance coupon on a panel ready for measurement” />

Annular Ring and Registration

Annular ring is the copper left around the hole after drilling, and it decides whether a via is reliable. A typical minimum for the higher product classes is 0.05 mm, with breakouts treated as a defect rather than as a variation. The ring is measured on a section or with an X-ray system, and the position of the measurement around the hole is recorded, because the thinnest point is the one that counts.

The ring depends on the drill position as well as on the pad, so the registration budget is shared between the drill, the artwork and the lamination. Where a design needs a small ring to fit the routing, the stackup review is the point at which the trade is still visible and still changeable. Once the panels are drilled, the same trade becomes a yield decision.

Coupon Design and Where It Sits

The impedance coupon is part of the stackup rather than an afterthought. It has to sit on the same panel, be built from the same materials, and carry structures that mirror the product traces closely enough for the measurement to mean something.

A coupon in a corner behaves differently from one in the middle, and a coupon with a different copper balance etches differently. Placing at least two and stating which is the reference removes an argument later, and the measurement itself is covered in the notes on impedance coupon testing.

Verifying Before Release, Not After

The verification is a review with a written output: the stackup as built, the impedance calculation, the drill data check and the coupon plan, signed before the panel is released. A checklist with those four items catches the errors that a drawing-only review misses.

Doing it after fabrication means finding the problem at electrical test or, worse, in the field. The review costs a couple of hours of engineering time and the omission costs panels, which is why the stackup belongs in the release package alongside the artwork.

Errors That Keep Appearing

Four mistakes return repeatedly: a mirror-imaged layer, a prepreg ply count that changed after the impedance was calculated, a solder mask thickness that was never included in the outer layer calculation, and a drill file that was not regenerated after a pad change.

Each of them is invisible on a schematic and obvious in a comparison of the drawing with the fabrication data. That comparison is the whole of stackup verification, and it is worth doing on paper rather than on copper.

FAQ

Who is responsible for stackup verification? The design owner states the requirement and the shop confirms that it can be built, and both sign the same document. A stackup reviewed on one side only has not been verified.

What tolerance should be put on dielectric thickness? Use the tolerance the shop can hold, typically plus or minus 10 percent, and check the impedance calculation against that figure rather than against a nominal value. Where impedance is critical, the dielectric tolerance is the first item a fabricator will ask to relax.

How many impedance coupons are needed? At least two per panel, made from the same materials as the product and placed so that one represents the centre and one an edge of the panel. A coupon placed only in the centre describes the good case rather than the board.