MOSFET Gate Charge Drive Circuit Design

The gate of a power MOSFET looks like a capacitor, and the datasheet figure that matters is not that capacitance but the charge that has to be moved to take the device from off to on. Sizing the driver from the gate charge and the required switching time is the whole of the calculation.

Gate Charge and the Drive Requirement

The gate charge is quoted as a curve of gate voltage against charge, and the total is the charge needed to reach the recommended drive voltage. For a typical power device it is a few tens of nanocoulombs.

The average driver current is the total charge divided by the switching time. Fifty nanocoulombs in fifty nanoseconds is one amp, which is well beyond what a logic output can supply and is the reason a dedicated driver is used.

The peak current is larger than the average because the current is not constant. A driver is specified by its peak output current, and the figure in the datasheet is measured with the output shorted through a defined resistance.

The Shape of the Gate Charge Curve

The curve has three regions. The first is the charge of the input capacitance up to the threshold voltage, the second is the flat region where the gate voltage stays constant while the drain current and voltage change, and the third is the final rise to the drive voltage.

The flat region is the Miller plateau, and it is where the switching actually happens. The gate voltage sits at a constant value because the gate current is flowing into the gate drain capacitance as the drain voltage moves.

Almost all of the switching loss occurs during the plateau, because that is when the device is simultaneously carrying current and holding voltage. The length of the plateau is therefore the number that matters for the thermal design.

Choosing the gate resistor

The gate resistor sets the peak current for a given drive voltage, and therefore the switching time. A larger resistor slows the edges, reduces the radiated emission and increases the switching loss.

The value is chosen from the acceptable loss and the emission limit, and the two pull in opposite directions. The optimum is usually found by measuring the device temperature and the emission spectrum while changing the resistor.

The resistor has to be placed at the gate, not at the driver. Placed at the driver with a long trace to the gate, the trace inductance forms a resonant circuit with the gate capacitance and the resistor no longer damps it.

driver current and Output Impedance

The driver has to supply the peak current for the duration of the switching event and to sink the same current when the device turns off. Its output impedance sets the peak current together with the external resistor and the internal gate resistance of the device.

The internal gate resistance of a large device can be a few ohms, which limits the benefit of an extremely fast driver. The datasheet quotes it, and it belongs in the calculation along with the external resistor.

Where several devices are driven from one driver, the peak current is the sum and the gate resistors are in parallel from the driver point of view. The driver has to be chosen for the combined load rather than for one device.

switching speed and Its Consequences

switching speed determines the loss, the emissions and the voltage overshoot. A faster edge reduces the overlap between current and voltage and raises the rate of change of current and voltage.

High switching speed and a low inductance layout go together. A fast edge in a loop with stray inductance produces an overshoot that can exceed the device rating, and slowing the edge is the simplest remedy when the layout cannot be improved.

The speed also affects the diode recovery in a bridge. A fast turn on of one device forces the complementary diode to recover abruptly, and the resulting current spike can be larger than the load current.

Driving from a Logic Output

A logic gate can drive a small MOSFET at a low switching frequency, where the charge that has to be moved is small and the transition can take a microsecond. The gate resistor then sets the current to a value the output can supply.

The problem is the current that flows through the output stage of the logic device while it is in its linear region. That current heats the device and is outside its rating, even though it lasts only for the transition.

A small driver or a pair of transistors in a totem pole arrangement solves the problem for a few cents and reduces the switching loss at the same time. It is usually the first improvement made to a circuit that runs warm.

Isolation and Level Shifting

A high side device needs a gate signal referenced to a node that swings, which means a level shift or an isolated driver. A bootstrap capacitor supplies the floating supply for a limited duty cycle, and an isolated supply removes the limit.

Isolation introduces its own propagation delay and its own variation with temperature. Where two devices in a bridge are driven through different paths, the difference between the delays appears as a difference in dead time and has to be accounted for.

The gate loop on the isolated side still has to be short, and the return of the gate current has to be a defined path. A gate circuit that relies on a random ground return is a source of oscillation and of erratic switching.

Thermal Coupling from the Driver

The driver dissipates power on every transition, and its own temperature rise matters because the output current of a driver falls as it heats. A driver placed close to the device shares the heatsink temperature, and the two effects combine to slow the switching as the converter warms up. Checking the gate waveform when the board is hot, rather than only at start up, shows whether the margin is sufficient.

Measurement and Verification

Measure the gate waveform with a probe of minimal ground lead, at the gate pin of the device. The waveform should show a clean plateau and a settling time that matches the calculation from the gate charge and the drive current.

Measure the drain voltage and current together to see the switching loss. The overlap area of the two traces is the energy per transition, and multiplying by the frequency gives the power that has to leave the device.

A gate waveform with a step or a slow final rise usually indicates a driver that is running out of current or an excessive gate resistor. The release checks that keep such a drive consistent are collected in our PCB design release checklist, and the assembly points are listed in judging PCB quality. The wider set of measures for containing a fast switching loop is described in our guide to EMI suppression design principles.

FAQ

Should I size the driver from the gate capacitance or the gate charge? From the gate charge. The capacitance varies strongly with voltage and the charge is the figure that has to be moved.

Where does the gate resistor belong? At the gate pin of the device. Placed at the driver it stops damping the resonance with the trace inductance.

Why does my device run hot at a low switching frequency? Check the plateau and the drain waveform. A slow transition keeps the device in the lossy region for longer than the frequency alone would suggest.