6G Phased Array and LEO Satellite PCB: The Consistency Problem

On 26 August 2026, Chinese high-frequency PCB manufacturer BenChuan Intelligent disclosed in its interim report that its high-frequency and high-speed products had entered small-batch shipment with optical module customers, that several co-packaged optics projects had reached the validation stage, and that satellite communication calibration network boards, power divider boards, and 6G phased array radar boards had begun small-batch delivery. The company framed the work around 6G satellite-terrestrial integration, integrated sensing and communication, and low-earth-orbit satellite links.

The order volumes are small. The signal is not. Small-batch delivery means a design has left the laboratory and entered engineering manufacturing, where the question stops being “can this board be built at all” and becomes “can it be built the same way every time.” For RF boards operating at millimetre wave, that second question is where most of the difficulty lives.

From Terrestrial to Space: What 6G Changes for the Board

The step from 5G to 6G is not primarily about more bandwidth. It is about architecture. Terrestrial base stations, low-earth-orbit satellites, user terminals, and edge compute nodes are expected to cooperate as one system, which means a single board may have to handle higher frequencies, larger data throughput, and a more entangled mix of RF and digital signals than any previous generation.6G phased array antenna board with dense RF trace routing

Three consequences follow for the PCB. First, the operating frequency moves into millimetre wave and beyond, where dielectric loss and conductor loss stop being secondary concerns. Second, channel counts rise sharply, so the board carries far more RF traces and far more interconnect. Third, the digital side does not slow down to compensate, so high-speed serial channels, power delivery, and RF front ends must coexist on the same substrate without interfering with one another.

This is the same convergence visible in AI infrastructure, where 800G and 1.6T optical modules pushed 16 to 78 layer backplanes and low-loss laminates into the mainstream. The difference is that satellite and 6G hardware adds a phase dimension on top of the loss dimension.

Why Phased Arrays Are the Hardest RF Board

A phased array steers a beam by controlling the relative phase of many radiating elements. That is a mathematical relationship between electrical length and frequency, which makes it a manufacturing tolerance problem. If two channels in the same array differ in trace length, dielectric constant, or impedance, they radiate with a phase error, and the beam shifts, widens, or develops a sidelobe.

Consider the numbers. At 28 GHz, one wavelength in a typical laminate is roughly a centimetre. A tenth of a wavelength, a common accuracy target, is about a millimetre. The corresponding phase error tolerance is on the order of a few degrees. As frequency rises, the physical tolerance shrinks in proportion, which is why arrays at higher bands become progressively less forgiving of routine PCB variation.Low earth orbit satellite communication PCB with calibration network

The controlling parameters are unglamorous. Dielectric constant must be stable across the panel and repeatable across lots, not merely within specification. Trace width and spacing must hold within tight limits after etching, since undercut changes impedance. Layer-to-layer registration must keep vias and ground references aligned, because a shifted reference changes the return path and therefore the impedance. Copper surface roughness matters as frequency rises, because roughness increases conductor loss through the skin effect, which is why low-profile foils such as HVLP grades have become standard in high-speed designs.

Grounding deserves specific mention. An array needs a continuous, low-inductance reference plane under the radiating and feed structures. Stitching vias must be dense enough to suppress parallel-plate resonances, and any slot in a reference plane becomes a radiator. Design reviews that treat the ground plane as leftover copper are the single most common source of unexplained RF performance in early prototypes. Getting the stackup and reference geometry right is a design conversation best held jointly with fabrication, which is why experienced RF teams treat PCB capability limits as design inputs rather than as a vendor selection afterthought.

High Layer Count, HDI and Fine Lines Converge

Increasing channel count forces density, and density forces advanced structures. Microvias, blind and buried vias, and any-layer interconnection allow RF feeds, digital routing, and power distribution to occupy the same volume without colliding. Where routing channels run out entirely, mSAP processes producing 0.075 mm and finer lines create the escape capacity needed around high-pin-count packages.

The manufacturing consequences stack up. Sequential lamination adds process steps and increases the risk of registration drift. Thin dielectric layers demand tighter control of pressed thickness, because a two-micron variation in a 100-micron layer is a two percent change in impedance. Copper plating uniformity across a panel affects both the etched geometry and the current-carrying capacity of power planes. None of these are new problems individually; the difficulty is that a 6G array board requires all of them to be solved simultaneously on the same panel.

There is also a supply-chain dimension. Low-loss laminates at these frequencies are supplied by a limited number of material houses, and the resin systems involved are the same ones under pressure from AI server demand. A programme that assumes ready availability of any specific grade without a qualified alternative is carrying a schedule risk that has nothing to do with its own engineering.

Consistency Is the Real Barrier in Satellite Electronics

A terrestrial base station that drifts can be serviced. A satellite cannot. Spaceborne electronics face temperature cycling between sunlit and eclipsed conditions, launch vibration, and vacuum, with no possibility of intervention for years. That changes the reliability discussion from “does it pass test” to “does it hold its characteristics.”

The consequence is that incoming material consistency, lamination parameters, plating uniformity, and etch compensation all move inside the quality system instead of being verified by a final electrical test. Final test can detect a defect, but it cannot detect a board whose dielectric constant drifted five percent in a direction that will still pass today and shift out of alignment after a year of thermal cycling. Controlling that requires lot-level material records, documented press recipes, and process capability data rather than sampling. It is precisely the discipline that a mature quality management system exists to enforce.

The same logic radiates outward into other demanding applications. Automotive boards carrying thick copper for high current, robotics boards using flex and rigid-flex for dynamic joints, and semiconductor equipment boards requiring precision and low interference all share the underlying requirement: repeatability of a governed process, not excellence of a single sample.

From Sample to Volume: Proving the Manufacturing System

Moving from small-batch to volume delivery requires a sequence, and skipping steps is expensive later.

Material qualification. Characterise the laminate lot to lot for dielectric constant and loss, not just against the datasheet. Build a coupon panel alongside the product so electrical properties can be measured without scrapping boards.

Process freeze. Lock lamination cycles, drilling parameters, plating recipes, and etch compensation, and treat any change as an engineering change requiring requalification. Freeze the stackup as well, because substituting a prepreg grade changes pressed thickness and therefore impedance.

Statistical control. Track impedance, line width, registration, and via quality as distributions with limits, not as pass or fail results. A process running at the centre of its window with modest spread is worth more than one running at the edge with excellent averages.

Test strategy. Coupon-based RF verification, time-domain reflectometry on controlled-impedance lines, and full functional test on the assembled module. For satellite programmes, add environmental screening that mirrors the intended orbit. A structured PCBA test strategy ties these layers together and defines what evidence accompanies each shipment.

Supply resilience. Qualify a second laminate source before the first one is constrained, and validate the alternative electrically rather than assuming equivalence.

The broader pattern across AI servers, 1.6T optical modules, 6G arrays, and low-earth-orbit satellites is consistent: higher frequency, denser interconnect, longer reliability horizons, and tighter tolerances. When satellite-terrestrial integration reaches volume deployment, the suppliers that prevail will not be the ones with the most impressive sample, but the ones that can hold material, geometry, impedance, and lot-to-lot consistency inside a documented window. That capability is what telecommunications PCB manufacturing has to deliver next.

Frequently Asked Questions

Why is phase consistency harder than loss control? Loss is a magnitude, so a small drift degrades a link gradually. Phase is a relationship between channels, so a small drift in one channel shifts the beam. Array performance therefore depends on matching, not only on absolute quality.

Can standard FR-4 be used for phased arrays? Not at millimetre wave. Standard FR-4 has higher dielectric loss and looser dielectric constant tolerance than the application allows. Low-loss, tightly specified laminates with qualified lot consistency are required.

What tolerance matters most in fabrication? Dielectric constant stability and layer-to-layer registration, followed by etched line width and pressed dielectric thickness. All four feed directly into impedance and electrical length, which is what phase depends on.

How should a satellite board programme begin? With material qualification and stackup freeze, before any layout optimisation. Establishing what the process can hold repeatably makes the design work more productive and prevents late redesign.

Where does small-batch delivery fit? It is the transition point. Small-batch proves that the process, not just the design, works, and it is the stage where process capability data should be collected for the eventual volume ramp.