Why Co-Packaged Optics Moves Heat Into the Board
Co-packaged optics changes where the heat goes. Instead of placing a pluggable module at the faceplate, the optical engine sits next to the switch ASIC on a shared substrate. That shortens the electrical channel, removes a long lossy trace and cuts the drive power that a pluggable interface would need. It is the reason the industry keeps pushing in this direction even though the assembly problem becomes far harder. The trade is thermal: heat that once spread across a faceplate cage now lands within a few millimeters of the switch die. The board stops being a passive interconnect and becomes part of the cooling path, and its copper distribution becomes part of the thermal budget.
The scale of the change is easier to see in numbers. Industry forecasts put the growth of co-packaged and near-package optical engines in the range of four hundred percent across the next few product cycles, driven by switch capacities of 51.2T and beyond. At that density a single rack can dissipate tens of kilowatts, and the share of that heat generated inside the optical engine is no longer small enough to ignore. It has moved from a supporting role to a design constraint that shapes the substrate.
This is a real change in design responsibility. When a thermal engineer used to size a heatsink for one package, the printed circuit board was simply a boundary condition. In a co-packaged design the board carries heat laterally, spreads it into the enclosure and, in some architectures, conducts it into a cold plate through the same vias that carry the high-speed signal. Layer count, copper weight and via geometry stop being a purely electrical decision.
The 17.47 Billion Yuan Signal: Capital Follows the Thermal Path
In August 2026, the optical module leader Zhongji Innolight agreed to acquire a 10.47 percent stake in Suzhou Jitan Technology for roughly 1.747 billion yuan in cash. The target company supplies thermal interface materials and EMI shielding used in 800G and 1.6T optical modules and in liquid-cooling hardware. A component supplier buying into a materials company is not a routine transaction. It says that the competitive boundary in high-speed optics has moved from bandwidth alone to bandwidth plus thermal and electromagnetic control.
For anyone planning an optical module program, the practical reading is straightforward. The material stack now sits inside the electrical design space. Thermal interface materials, shielding films and the board’s own dielectric all interact with the signal path. Selecting them after the layout is frozen produces either a thermal problem or an impedance problem, and usually both.
What a 1.6T Module Demands From the Stackup
At 1.6T the module is no longer a small plug with a simple rigid board. It typically combines a rigid section for the DSP and driver area with a flexible section that carries the optical engine, and the transition between the two is where most yield is lost. Differential impedance control tightens toward plus or minus five percent across the whole channel, including the flex bend and the connector footprint. Any dielectric inconsistency, any variation in copper thickness, shows up as a reflection.
There is a second constraint that arrives at the same time. The optical engine is bonded to the substrate, and the substrate is bonded to the board. Each bond line adds thermal resistance and mechanical stress. Warpage during reflow, driven by mismatched coefficients of thermal expansion across the laminate, the copper and the package, can open a gap at exactly the interface that carries the heat. Controlling that warp is a lamination and material question long before it becomes an assembly question, and it is one of the reasons high-performance optical boards are qualified on flatness as carefully as they are on impedance.
Those requirements push the substrate toward low-loss laminates, tighter layer-to-layer registration and controlled copper balance on every signal layer. A manufacturer that can hold impedance on a flat test coupon but drifts on a populated panel is not a stable supplier for this class of work. Consistency across the panel, and across the production lot, matters more than a peak number measured once.
Copper Balance, Vias and the Impedance Trade
Heat spreading and impedance control pull in opposite directions on the same layers. Thermal designs want large copper pours and dense thermal via arrays. High-speed channels want thin, uniform copper features with controlled reference planes and predictable dielectric height. Adding a thermal via field under a differential pair changes the local capacitance and can shift impedance enough to fail a time-domain reflectometry limit.
The workable compromise is geometric. Thermal vias are placed outside the differential channel and stitched to a dedicated thermal plane rather than to the signal reference plane. Where heat must be pulled directly under a driver, the via field is designed with an impedance model in hand, not added as a post-layout afterthought. Back-drilling, buried vias and via-in-pad filling all change both the thermal resistance and the electrical behavior, so they have to be evaluated together. This level of co-design is why high-layer-count boards for optical and AI applications deserve a manufacturing partner that can simulate and then hold the process.
Thermal Paths Belong in the Layout, Not the Enclosure
Teams that treat thermal management as a mechanical task tend to discover the problem late. In a co-packaged module the die, the substrate, the board and the cold plate form a single series path. Each interface adds resistance. A thermally conductive prepreg with poor flow fills the gap unevenly, and the resulting voids raise junction temperature in a way that no heatsink change can recover.
The better approach is to allocate the path at the beginning. Decide how much heat leaves through the solder balls versus the board versus the lid, then design copper and via structures to match that split. Where a cold plate couples through the board, the mechanical tolerance of the assembly has to be part of the electrical stackup budget, because the required copper thickness for heat flow may not be the thickness that keeps the differential channel at its target impedance.
Manufacturing Discipline: Consistency Beats Peak Capability
Co-packaged products fail in the field for reasons that look mundane on a datasheet. Resin flow variation, drilling registration drift, plating thickness spread and lamination voids all appear as either thermal hot spots or impedance excursions. Neither shows up during a first-article inspection, and both show up in volume.
Volume programs also expose the difference between capability and repeatability. A line that can drill a 0.15 millimeter via is not the same as a line that can drill it with consistent registration across a panel and across a month of production. Registration drift of a few tens of microns changes the impedance of a tightly coupled differential pair, and it also changes the cross-sectional area available for heat flow through a thermal via. Both effects are small on their own and significant together.
This is where process control earns its place next to design talent. Automated optical inspection catches pattern defects, but defect classification and data feedback are what turn inspection into a tightening loop. When image-based classification replaces most manual review, the same dataset that flags a defect also tells the process engineer which parameter drifted. Modules with this kind of closed loop hold their parameters over a long production run, which is the only way a co-packaged program stays economically viable.
What Buyers Should Ask Before a Program Starts
Three questions separate capable suppliers from optimistic ones. First, can the manufacturer show impedance data from a populated panel rather than a coupon, and over a production window rather than a single shift? Second, how are thermal vias and copper pours validated against the high-speed channel model? Third, what happens to yield when the flex transition is added to the rigid section?
It is also worth being specific about what a qualification package should contain. A meaningful submission includes panel-level impedance statistics, cross-section photographs of thermal and signal vias, flatness data after reflow, and a documented change-control process for laminate lots. Suppliers that treat these as routine requests are usually the ones that have already built the measurement infrastructure. Suppliers that treat them as unusual are telling you something about how their process is managed.
The supplier that answers these with process records is the one worth engaging. Optical module programs move quickly, and re-qualifying a stackup midway through a qualification cycle costs more than choosing carefully at the start.
Optics, Board and Cooling as One System
The direction of travel is clear. Data center interconnect keeps raising the per-port rate, module power keeps rising, and the boundary between optics, silicon and thermal hardware keeps dissolving. Capital flows reflect that: a module vendor buying thermal materials capability is a bet that the next competitive edge is system integration, not a faster laser.
For PCB and PCBA suppliers the implication is that the job description has widened. Delivering a compliant board is the baseline. Holding impedance, thermal path and long-run consistency at the same time is what the next generation of optical hardware actually requires. Teams that build that capability now will be the ones that get designed in when the volumes arrive.
