Solder Defects Behind Most Board Failures

When a prototype behaves erratically, the search usually starts in the software and works back toward the design. In practice a large share of hardware failures originate at the solder joint, and a joint that is marginal produces symptoms that look exactly like a software or a design problem. Checking the assembly before investigating the architecture is not a shortcut, it is the order of diagnosis that matches the statistics.

Why Assembly Defects Dominate Failure Reports

Published reliability data from hardware support functions consistently attributes the majority of failures to the soldering process rather than to the circuit design. The reason is straightforward: a design is reviewed, simulated and tested before release, while a joint is the product of a process with many variables, including paste volume, placement accuracy, reflow profile and handling. The design is a single decision; the joint is repeated thousands of times per board.

The consequence for diagnosis is that a marginal joint can behave correctly for a long time. A high-impedance connection passes a low-speed signal without difficulty and fails only when the data rate rises, the temperature changes or the board flexes. That behaviour imitates an intermittent software fault, and it is the reason teams spend days on code while a joint sits behind the symptom.

Defects That Do Not Announce Themselves

A partial joint, in which the solder does not fully wet both surfaces, has enough contact to pass a continuity test but not enough to carry current reliably. On a supply pin it produces a local voltage drop that changes with the load. On a high-speed bus it produces reflections that appear as data errors only during a burst transfer, such as an operating system load or a video stream, while a simple data transfer appears to work perfectly.

Bridging is the opposite defect: a conductive path where none should exist. A bridge between the pins of a small capacitor near a processor can short a rail that appears to work because the impedance is not low enough to trip the current limit, and finding it by measuring each component individually takes far longer than examining the joints under magnification.

Defects That Reflect the Process

Tombstoning, in which one end of a chip component lifts off its pad during reflow, is a process signature. It happens when the two ends of the component heat at different rates, and it is fed by unequal pad geometry, an unbalanced thermal load from the copper connected to each pad, or an asymmetric reflow profile. Seeing tombstones on a board is a signal to look at the footprint and the copper balance rather than at the component.

Overheating leaves its own signature. Connector housings are usually moulded from a plastic whose melting point is not far above the reflow temperature, and a profile with too much peak temperature or too much time above liquidus can deform a housing so that a contact loses its contact pressure. The result is a display that does not work or a port that does not enumerate, and it is routinely attributed to a firmware issue.

Profile Control and Its Limits

The reflow profile controls the outcome of the whole process, and its two most important parameters are the peak temperature and the time above liquidus. Both are constrained from opposite directions: enough heat is required to wet the joints and form a reliable intermetallic layer, and little enough heat is required to avoid damaging the components and the laminate. The window narrows when a board carries both a heavy thermal load, such as a large inductor, and a delicate component, such as a fine-pitch connector.

This is where a uniform soak stage helps. Bringing the whole assembly to a similar temperature before the reflow peak means the heavy parts and the light parts reach the peak together, which reduces both the risk of a cold joint on the heavy part and the risk of damage to the delicate one. A profile that is good for one of those extremes is usually poor for the other.

Checking the Obvious Before the Difficult

The productive diagnostic order starts with the assembly. Confirm that the correct components are fitted, that their orientation matches the silkscreen, and that there are no unconnected, partially connected or bridged joints. Look at the solder fillets on the connectors to confirm that they are full rather than partially wetted, and check that the connector housings have not deformed. Inspect the joints around the power devices, where the thermal load is highest and a marginal joint is most likely.

Only when those checks are complete is it efficient to investigate the design. The point is not that design faults are rare, but that they are far more expensive to investigate, and a large proportion of the investigations are resolved by the assembly checks. Our solderability testing material covers the incoming checks, the solder wetting notes describe the surface conditions that cause partial joints, and the design release checklist includes the assembly review points.

Classification of Common Solder Defects

Grouping the failures makes the inspection faster. Solder defects fall into three classes: those that leave a joint mechanically present but electrically marginal, those that create an unintended connection, and those that damage a component or its housing. The first class includes the partial joint, the cold joint and the insufficient fillet. The second includes bridging and solder balls that have travelled to a neighbouring pad. The third includes thermal damage to a connector housing, to an electrolytic capacitor and to any package whose moisture content was not driven off before reflow.

Each class has a different remedy. The marginal class is addressed by paste volume, pad geometry and profile. The unintended-connection class is addressed by stencil design, aperture reduction on fine-pitch parts and careful cleaning. The damage class is addressed by profile control and by the moisture sensitivity handling procedure for the components involved. Identifying the class first avoids applying a fix from the wrong group, which is a common reason a defect reappears after it appears to have been corrected.

FAQ

How can a partial joint pass an electrical test? Because a continuity or functional test usually applies a small current at a low frequency, and a mechanically touching joint conducts adequately under those conditions. The same joint fails when the current rises or the frequency increases, which is why boards should be tested under conditions that resemble the application. Where a fault appears only at high data rates, a partial joint on the bus is one of the first things to examine.

Why does a connector housing melt during reflow? Because the profile delivered more heat than the housing material tolerates, either as a higher peak temperature or as a longer time above liquidus. The remedy is usually to reduce the thermal load on that area of the board by adjusting the profile, or to select a connector rated for the process. Once the housing has deformed, the board cannot be repaired reliably, because the contact pressure has been lost inside the moulding.

What does gopcb recommend before debugging a prototype? Inspect the assembly first, under magnification, with a checklist that covers component identity, orientation, joint quality and connector condition. This costs an hour and resolves a substantial share of the faults that would otherwise be investigated as design problems. The boards that remain problematic after that inspection are usually the ones with a genuine design or component issue.