Crystal Oscillator Impedance And Load Capacitance

A crystal oscillator is one of the few circuits on a board where the passive components and the routing are part of the active loop. The crystal is not a filter placed beside an amplifier; it is the frequency determining element inside a feedback path whose gain and phase margin must be satisfied at every temperature the product will see. Getting the load capacitance right is necessary but not sufficient.

This article covers what the oscillator loop actually requires: how load capacitance pulls the frequency, why negative resistance is the figure that predicts start-up, how drive level affects long term stability, and what the layout must do to keep the loop clean.

The Loop The Circuit Forms

An oscillator consists of an amplifier with gain greater than one and a feedback network that shifts phase by a multiple of three hundred and sixty degrees at the intended frequency. The crystal provides a narrow band around which that condition holds, and everything outside that band is suppressed. The circuit therefore works only inside the window where the crystal’s impedance is inductive and the amplifier has the gain to sustain oscillation.

Because the condition is a loop condition, a change in any element shifts the operating point. The load capacitance seen by the crystal is the most obvious, and the parasitic capacitance of pads, traces and the device pin is part of it. This is why the frequency measured on a board is rarely the frequency marked on the crystal, and why the discrepancy is predictable rather than mysterious.

Load Capacitance And Frequency Pulling

A crystal is specified for a nominal load capacitance, commonly eight, ten or twelve picofarads. Operating it at a different load shifts the frequency by an amount given by the crystal’s trim sensitivity, which is quoted in parts per million per picofarad. The shift is small and it is systematic, so it can be designed out by choosing the two load capacitors to produce the intended value once the parasitics are added.

The practical method is to start with the specified value, subtract the estimated parasitic capacitance of the pin, the pad and the trace, and split the remainder between the two capacitors. The estimate is rarely exact, so the first prototype should carry pads for a trimmer or for alternative capacitor values, and the frequency should be measured rather than assumed.

Negative Resistance And Start-Up Margin

Oscillation begins from noise, and it grows only if the amplifier can supply more energy per cycle than the resonator consumes. The measure of that ability is the negative resistance presented by the circuit, which must exceed the crystal’s equivalent series resistance by a comfortable factor. A common rule is that the negative resistance should be at least three to five times the maximum resistance the crystal will present over temperature and ageing.

The margin shrinks as the load capacitance increases, because a larger load reduces the loop gain. It also shrinks at low temperature and at the low end of the supply range, which are exactly the conditions a product is least likely to be tested under. Measuring the negative resistance by inserting a variable resistor in series with the crystal and finding the value at which oscillation stops is a quick and decisive test.

Drive Level And Long Term Stability

The crystal dissipates power while it oscillates, and the permissible drive level is stated in microwatts on the datasheet. Operating above it accelerates ageing, shifts the frequency and can eventually fracture the resonator. Modern low power oscillators rarely exceed the limit, but the risk appears when a high gain configuration is used to guarantee start-up on a wide supply range.

The drive level is set by the amplifier current and by the series resistor that is often placed to limit it. That resistor also reduces the loop gain, so the two figures move together: a design that adds series resistance to protect the crystal must be rechecked for negative resistance margin. The frequency stability quoted over life and temperature is a statement about the whole design, not only about the resonator.

Layout Of The Oscillator Loop

The oscillator loop should be treated as a small analogue circuit with its own reference. The two load capacitors and the crystal belong within a few millimetres of the device pins, with a solid ground reference underneath them and no digital routing passing through the region. The trace from the amplifier output to the crystal carries the highest amplitude signal in the circuit and should be kept short.

The ground return for the load capacitors should connect to the device ground pin by the shortest available path rather than through the general plane, and stitching vias beside the components hold the local reference stable. Because the loop is sensitive to capacitance, a ground routing plan that keeps the reference continuous under the oscillator is more valuable here than in almost any other part of the board.

Interaction With The Rest Of The Design

A clock is a periodic signal, and periodic signals are a source of harmonics. The oscillator trace will radiate unless it is short and referenced, and the harmonic content will couple into whatever runs beside it. Keeping the oscillator away from connectors, from the board edge and from switching supplies addresses most of the problem, as does keeping the loop on a layer adjacent to a solid plane.

Where the design carries sensitive analogue measurement, the clock is often the dominant interference source. Arranging the board so that the clock and the analogue front end occupy different regions, and following mixed signal layout practice for the boundary between them, is what keeps the measured floor at the level the components can achieve.

Verification

Three measurements cover most of the risk. Start-up time from power applied to stable oscillation, measured at the extremes of supply and temperature, proves the negative resistance margin. Frequency measured at the operating load, compared with the value calculated from the trim sensitivity, proves the load capacitance assumption. Output amplitude and waveform shape confirm that the drive level is in range and that the oscillator is not running in a harmonic mode.

All three are inexpensive and all three are routinely skipped when the design is copied from a previous product. A stackup chosen with emissions in mind helps, but it does not substitute for measuring the loop, because the failure mode is a stopped clock rather than a marginal emission.

FAQ

Can I use the load capacitance from a previous design? Only if the device, the pins and the layout style are identical. Parasitic capacitance depends on the package, the pad size and the trace length, so a copied value is a starting point rather than an answer.

Why does the oscillator fail only in cold conditions? Crystal resistance rises and loop gain falls as temperature drops, so the start-up margin is smallest at the cold extreme. A design that oscillates at room temperature can still fail in a cold chamber.

Is an external oscillator safer than a crystal? A packaged oscillator removes the loop design problem entirely and gives a guaranteed start-up specification, at higher cost and with its own supply and jitter characteristics. Where the clock must be reliable without measurement, it is frequently the better engineering choice.