Embedded Capacitance In PCB Laminates

A power and ground plane pair separated by a dielectric is a capacitor, because two conductors with an insulator between them always are. In an ordinary board the separation is large and the capacitance is small, so the planes are treated as a low impedance connection rather than as a component. As the dielectric becomes thinner, the capacitance rises, and at some point it is large enough to be a useful part of the decoupling network.

This article explains what embedded capacitance is, how it changes the impedance of the power distribution, and where the approach is worth the additional cost and process complexity.

What Embedded Capacitance Is

The capacitance is formed by the plane pair itself, and its value is proportional to the area of the planes and the dielectric constant of the material between them, and inversely proportional to the separation. A conventional laminate with a separation of a few hundred micrometres gives a capacitance per unit area that is small, while a thin laminate with a separation of tens of micrometres gives a value that is one or two orders of magnitude larger.

The capacitance is distributed across the whole board rather than concentrated at one point, which is the property that makes it interesting. A discrete capacitor supplies charge from one location, while the plane pair supplies it from the area immediately around the device that is drawing the current.

The Materials Used

The dielectric is a filled polymer supplied as a thin film, typically between twenty and a hundred micrometres thick, with a dielectric constant higher than that of a standard laminate. It is laminated between a power plane and a ground plane, and the resulting structure is a passive layer in the stack.

The material has to be compatible with the rest of the stack in its expansion and its lamination condition, because a thin layer with different properties can bow the stack or delaminate. The adhesion between the filled film and the copper is the critical mechanical property, and it is verified by thermal cycling and by the standard peel tests. The dielectric strength also matters, because the layer is thin and a defect in it is a short between the planes.

How It Reduces The Power Distribution Impedance

The impedance of a power distribution network has a resonant character: the capacitance of the network and the inductance of the path between the source and the load form a resonance, and the impedance rises at the resonant frequency. Discrete decoupling capacitors add capacitance and reduce the impedance over a band, but their effectiveness at high frequency is limited by the inductance of their mounting.

Embedded capacitance adds a large capacitance with a very small inductance, because the current path from the plane to the device is short. The result is a lowering of the impedance across a wide band, including the range where discrete capacitors are least effective because of their mounting inductance. The effect is largest at the higher frequencies, which is where the plane pair is most useful.

Limits Of The Approach

The capacitance is not a substitute for bulk capacitance. The total energy stored in the plane pair is modest, so a large transient that draws energy over a long period still needs a bulk capacitor. The embedded layer handles the high frequency content of the transient, and the bulk capacitor handles the low frequency part.

The layer also consumes a pair of planes and a lamination step, which adds cost and constrains the stack. On a board where the layer count is already determined by the routing, adding the pair may be free; on a board where it forces an additional pair, the cost is significant. The dielectric thickness also has a practical minimum, because a thinner layer is more prone to defects and to handling damage.

Design Implications

The plane pair should be placed as close as possible to the surface where the components are mounted, so that the via from the device to the plane is short. The via inductance is part of the path, and a plane pair placed deep in the stack has less benefit than one placed near the top.

The plane pair also has to be continuous under the devices that need it. A plane that is split to accommodate several power rails gives up most of its benefit, because the area is the parameter that sets the capacitance. Where several rails are needed, the usual arrangement is a thin layer for the main rail and conventional layers for the rest. The rules for splitting planes are described under power plane splitting, and the routing consequences in multilayer design rules.

Where It Is Worth The Cost

The case is strongest where a high speed device draws a large transient current and the decoupling capacitors cannot be placed close enough to be effective, which is the situation on a dense board with many devices and few free areas. It is also strong where the emission limit is tight, because the plane pair also reduces the radiated field from the power distribution.

The case is weakest where the device count is low, where there is ample area for discrete capacitors, or where the cost pressure is high. In those cases the conventional approach with well placed capacitors and a low inductance via pattern achieves most of the benefit at a fraction of the cost. The general principles of suppressing the noise at its source are described for EMI suppression.

Process Control and Verification

On a design of this kind, embedded capacitance is the item that decides how the rest of the board is arranged. Reviewing the design before the data is released is cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end. Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule.

The process window is set by the narrowest step in the flow, so an improvement anywhere else shows up as margin rather than as yield until that step is addressed.

Process Control and Verification

On a design of this kind, embedded capacitance is the item that decides how the rest of the board is arranged. Reviewing the design before the data is released is cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end. Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule.

FAQ

Does embedded capacitance replace the decoupling capacitors? No. It reduces the impedance at high frequency, where discrete capacitors are limited by their mounting inductance, and the discrete parts still supply the bulk of the charge.

Why does the placement of the plane pair matter? Because the via from the device to the plane is part of the current path. A pair buried deep in the stack has a longer path and delivers less benefit at high frequency.

Can the planes be split between several rails? They can, but the capacitance is proportional to the area, so splitting reduces the benefit over the area that is removed. The main rail is usually given the thin layer.