Copper Filled Via Planarity: Dimple and Cap Control

Via planarity describes how flat a filled via is relative to the surrounding copper, and it decides whether a component can be placed over it. A filled via that is slightly dished leaves a dimple that traps paste and creates a void. The measurement is small, but the consequence at assembly is not. It is one of the few fabrication features that assembly can feel but not see.

Filling is used for via in pad designs, for stacked microvias and for thermal paths that have to carry heat through the board. Each of those needs the fill to be conductive and flat rather than merely plugged. The two requirements come from different parts of the process. The fill has to be sound internally as well as flat on top.

What Via Planarity Means

Planarity is measured as the difference in height between the centre of the via and the copper surface around it. That difference is called the dimple, and it is usually specified as a maximum depth. A small dimple is normal even in a well controlled process. A section through the via is the only way to confirm that the fill is solid.

The measurement is taken after plating and after any planarisation step, because both change the surface. It should also be taken after capping, since the cap adds copper over the fill. The reference plane has to be defined so that readings can be compared between panels. A cap that is thinner than the specification will not survive the next step.

Why Dimple Forms

Dimple forms because the plating bath deposits faster on the surface than inside a small via, and because the fill shrinks slightly as it solidifies. The via has a limited supply of fresh chemistry at its base, so the deposit there lags behind. That lag becomes the dimple. Fresh chemistry has to reach the base of the via for the deposit to build there.

Paste-based fills behave differently, because the paste shrinks during curing and can pull away from the barrel wall. A paste fill with the wrong profile leaves a larger dimple than a plated fill, as the comparisons in via plugging process control work show. The choice of fill type therefore sets the planarity that can be achieved. Resin or paste that has shrunk away from the wall leaves a void that heat cannot pass.

Plating Parameters and Fill

Copper fill by plating depends on a bath that can plate into a small feature, which means controlled additive levels and good agitation. Current density, the ratio of surface to hole area and the plating time all change the result. A bath that is balanced for through-hole plating may not fill a microvia well. Copper fill that stops short of the barrel wall will not carry current reliably.

Filling is normally done with a dedicated chemistry and a plating programme that starts at a low current and ramps up. The ramp allows the additive to reach the base of the via before the deposition rate rises. Skipping the ramp produces a keyhole or a void rather than a fill. A programme that fills one via size may fail completely on a larger one.

Capping and Overburden

After filling, a cap of copper is plated over the via to provide a solderable surface. The cap has to be thick enough to survive planarisation and to cover the fill completely, and the general guidance in PCB via plugging material applies to the same step. Thin caps break through during grinding and expose the fill material. Cap thickness should be specified with a tolerance, not as a minimum only.

Overburden is the extra copper on the surface that has to be removed later. More overburden means more grinding, which risks dishing the surrounding copper. The cap thickness and the overburden should be planned together rather than adjusted later. Overburden also decides how much copper has to be removed, which affects cost.

Planarisation and Grinding

Planarisation removes the overburden and brings the via level with the surrounding copper. Mechanical grinding, chemical mechanical polishing and etch-back are all used, and each removes material at a different rate across the panel. The uniformity of that removal decides the final planarity. Removal rate should be verified on a coupon before production panels are run.

Grinding that is too aggressive dishes the copper around the via and creates a new depression. Grinding that is too light leaves overburden and a raised via. The process window is narrow, which is why the step is controlled by measurement rather than by time alone. A raised via is easier to detect optically than a shallow dimple.

Measurement Methods

Planarity can be measured optically, with a profilometer, or from a microsection. Optical methods are fast and non-destructive, while a section shows the fill quality as well as the height. The two are complementary rather than alternatives. Readings taken at the panel edge often differ from those in the centre.

Measurements should be taken at more than one via on a panel and at more than one panel in a batch. A single reading cannot describe a process that varies with position, and the acceptance values used in PCB HDI via fill work are the usual reference. Paste volume over a dimple is hard to control, so the defect is hard to predict.

Effects on Assembly

A dimple that is too deep traps flux and paste, which produces a void in the joint beneath the component. A via that is raised above the pad prevents the paste from contacting the pad properly. Both faults appear as assembly defects rather than as fabrication defects. Where the design cannot be changed, the paste stencil should be reviewed.

Via in pad designs are the most sensitive because the paste is printed directly over the via. Where planarity cannot be held, the design should be changed to move the via off the pad. That decision is far cheaper at design than at assembly. A change of plating supplier is also a change of fill behaviour.

Records and Process Control

The record should carry the fill type, the plating programme, the cap thickness, the planarisation result and the measured dimple. Where a published standard applies, the acceptance criteria published by IPC give the reference for the plated surface. Trended over batches, the data shows whether the process is drifting. Planarity data is also what supports a capability discussion with the customer.

Process control also covers the incoming vias, because the hole size and wall condition set what the fill can achieve. A change of drill programme or of laminate changes the fill result even when the plating programme does not. Recording both together is what makes the trend meaningful.

FAQ

What is a dimple in a filled via? The small depression at the centre of the fill, measured as the difference in height between the via centre and the surrounding copper. Dimple depth should be quoted with the measurement method that produced it.

Can a dimple be avoided completely? Not entirely. The aim is to hold it within specification, because some depression is normal in both plated and paste fills.

Why does grinding sometimes make planarity worse? Aggressive grinding dishes the copper around the via, which adds a new depression where the overburden was removed.