Any-Layer HDI PCB: Design and Manufacture

What Any-Layer Means

In an ordinary multilayer board a via passes through the whole stack, and in an HDI board with a single build-up layer the microvias reach only the next layer. Any-layer HDI, sometimes called every-layer interconnection, goes further: a microvia can be placed between any two adjacent layers in the stack, and the layers are connected in a chain of microvias rather than in a single long drill. The practical benefit is freedom in routing. A signal can change layers wherever the layout needs it, which is what makes the structure attractive for dense handheld designs where a few large through vias would block entire channels.

How the Stack Is Built

The core is a conventional rigid core, and the outer layers are added by sequential lamination. After each lamination the microvias are drilled by laser through one dielectric layer, plated, patterned and covered, and then the next layer is added on top. A board with microvias in every layer therefore goes through the lamination and laser cycle as many times as it has build-up layers, and each cycle has its own registration and plating consequences. The process is not a single step that happens to be fine, it is a repeated step that has to hold its tolerance every time.

Microvia Rules

The dielectric thickness a laser can drill reliably sets the maximum aspect ratio, typically around 0.75 to 1.0 for a well-controlled process, so a 100 micrometre via goes through roughly 80 to 100 micrometres of dielectric. The capture pad, the target pad on the layer below, must be large enough to absorb the registration error of both the laser and the lamination, which is why the pad is usually two to three times the via diameter. The distance from the microvia to any other copper feature, and from the microvia to the edge of the plane it lands on, follows the same reliability logic: the resin around the via is thin, so antipalad clearance and the separation to neighbouring traces have to be set generously relative to a through via.

Stacked and Staggered

Two microvias can be related in three ways. A stagger places the second via offset from the first, connected by a short copper land, which distributes the mechanical stress. A stack places the second via directly on top of the first, which saves layout area but concentrates the thermal expansion stress at the interface and is the structure that fails first in thermal cycling. A skip moves from layer one to layer three in a single laser step, which is possible only where the dielectric thickness and the laser parameters allow it. Design rules from a fabricator will normally state which of these are accepted and what the maximum number of stacked vias is.

Design Rules and Practical Limits

The rules that matter are the via diameter and its tolerance, the pad diameter, the land diameter after each lamination, the dielectric thickness per layer, the copper thickness on each layer, and the registration tolerance. Board thickness grows with the number of build-up layers, and a stack of ten or more layers becomes expensive in lamination cycles rather than in material. Copper thickness on an outer layer is limited by what can be plated into a fine-line pattern, so a designer who wants both fine lines and heavy current has to separate the two onto different layers.

Cost and Yield Drivers

Price is driven by the number of lamination cycles, the panel yield at each cycle, the laser drilling time and the test complexity. A design that needs one build-up layer on each side is a modest step up from a conventional board; a design with four build-up layers is a different category, because each additional cycle multiplies the chance of a scrap panel. The design choices that reduce cost without losing density are the obvious ones: use the smallest number of lamination cycles that satisfies the routing, avoid stacking where a stagger will do, keep the via count reasonable, and place the fine-pitch area in one region instead of spreading it across the board.

A Design Checklist

Confirm the maximum aspect ratio and the minimum microvia diameter with the shop before routing. Use the land diameter the shop can hold, not the one that fits. Check that every microvia lands on a pad large enough for the registration budget. Keep stacked vias below the accepted limit. Check the drill-to-copper clearance around every microvia. Confirm that the impedance-controlled layers are not the layers being re-laminated after the impedance is set. Finally, confirm the test strategy, because probing microvias is difficult and the shop may need test points on an outer layer.

Testing and Reliability of Microvias

Microvias are difficult to probe, so the test strategy has to be decided with the stack-up rather than after it. In-circuit test needs access, which on an any-layer board usually means escape vias to an outer layer or a dedicated test coupon, and flying probe is slower on a dense design but avoids the fixture. The reliability question is separate and is answered by thermal cycling and by the IST test, both of which load the weak point of the structure: the interface between two copper lands inside a laminated resin. The failure mode of concern is barrel separation after repeated expansion, and the variables that control it are the plating thickness, the surface preparation before each lamination cycle and the number of stacked vias in the chain. A fabricator who quotes an any-layer stack should be able to state the plating thickness that will be held in the microvia and the cycle count that the structure has been qualified to.

FAQ

What is any-layer HDI? A build-up structure in which microvias can connect any two adjacent layers rather than being limited to the outer layers.

How many lamination cycles does it need? One per build-up layer on each side, so the count follows directly from the number of layers that carry microvias.

Can microvias be stacked? Usually yes up to a limit set by the shop, but staggering is more reliable in thermal cycling and should be preferred where space allows.

Is it more expensive than standard HDI? Yes, mainly because every extra lamination cycle adds process steps and multiplies the risk of scrapping a panel.

What limits the microvia diameter? The dielectric thickness it must penetrate and the laser parameters, expressed as an aspect ratio of roughly 0.75 to 1.0 on a controlled process.

Conclusion

Any-layer HDI buys routing freedom in exchange for repeated lamination cycles, and the design has to respect the registration and aspect ratio limits that each cycle imposes. Agree the microvia rules with the fabricator first, prefer staggered vias over stacked ones, and keep the build-up count as low as the routing allows. The structural capability is described under PCB capabilities, the layer build-up and laser steps fall under PCB manufacturing, and the routing decisions that decide how many microvias are needed are made in PCB design and layout. Dense handheld builds are usually prototyped through prototype PCB assembly in 2026.