Back Drilling PCB: Removing Via Stubs for High Speed

The Problem a Via Stub Creates

A through hole via runs the full thickness of the board. When the signal only needs to travel between two inner layers, the portion of the barrel below the connection point serves no electrical purpose. That leftover section is the stub, and it behaves as an unterminated transmission line branch hanging off the signal path.

At low frequencies the stub is electrically short enough to be irrelevant. As data rates rise, its length becomes a meaningful fraction of the wavelength, and the stub starts to resonate. The visible symptoms are reflection, increased return loss, insertion loss that rises sharply near the resonant frequency, a closing eye diagram, and additional crosstalk and radiated emission. The stub is acting as an antenna attached to the signal net.

This is why the issue appears at exactly the point where the design was already difficult. At 10G and 25G the effect is noticeable; at 56G and 112G PAM4 signalling it becomes one of the dominant impairments in the channel.

How Back Drilling Works

Back drilling is a second drilling operation performed after plating, using a drill of slightly larger diameter than the original via to remove the unused portion of the barrel from the opposite side of the board. Depth is controlled so the drill stops before it reaches the layer where the signal connects.

Three things have to be controlled for it to work.

• Depth accuracy: the tolerance on how close the drill comes to the target layer. Advanced shops hold roughly plus or minus three to four thousandths of an inch.
• Registration: the back drill has to be concentric with the original via, which requires the board position to be known accurately. X-ray alignment is normally used to locate the existing holes before drilling.
• Residual stub target: how much barrel is deliberately left. The current targets are around 8 mil for 25G class systems and 5 mil or less for 56G and above.

The relationship between depth tolerance and stub target is where the process difficulty lives. Holding a 5 mil residual stub requires the drill to stop within a few mil of the correct depth, on a board whose thickness varies slightly across the panel. That is why back drilling is a capability question rather than a checkbox.

Back Drilling Against Blind and Buried Vias

• Cost: back drilling is moderate, blind and buried vias are higher.
• Process complexity: back drilling is moderate and adds a single controlled depth operation; blind and buried vias require sequential lamination.
• Signal performance: both are excellent. The difference is in the residual stub, which back drilling leaves at a controlled length and blind vias eliminate entirely.
• Layer count suitability: both work across the eight to thirty two layer range.

For most high speed programs, back drilled through vias are the better economics. They deliver most of the signal integrity benefit at a fraction of the manufacturing complexity, and they allow the stackup to be built with conventional lamination. The structural equivalent in a high density board would be HDI construction, which is the right answer when routing density, not stub control, is the binding constraint.

What It Delivers

• Signal integrity: removing the stub resonance stabilises high speed differential channels and removes a frequency dependent loss mechanism from the link budget.
• Lower EMI risk: a stub acts as an antenna; shortening it reduces the radiation and the coupling to neighbouring nets.
• Cost against the alternative: typically fifteen to thirty percent less than a fully blind and buried via construction for the same layer count.

Where the design benefits most: 10G and 25G Ethernet, 56G PAM4 server boards, PCI Express generation four and five, 5G base station backplanes, and data centre switch fabrics. In all of those the channel loss budget is tight and the via is a significant contributor.

Design and DFM Guidance

• State the back drill layers explicitly. The fabricator has to know from which side and down to which layer each via is to be drilled, and ambiguous artwork is the most common source of a wrong result.
• Specify the permitted residual stub, in length units, not as a description. The number drives the depth tolerance the process has to hold.
• Plan the stackup around the signal layers. Typical structures are an eight layer high speed network board, twelve to sixteen layer server designs, and twenty to thirty two layer communications backplanes. Vias that will be back drilled should be placed so the signal connection is on a layer the drill can reliably stop at.
• Keep impedance within about plus or minus five percent. Stub control and impedance control are both required; fixing one does not fix the other.
• Allow for the drill diameter. The back drill is larger than the via, so the antipad and the surrounding copper keep out area have to accommodate it.
• Consider mechanical alignment, since the depth is measured from the board surface and surface conditions affect it.

All of those are decisions made in the layout and the fabrication notes, which is why the review belongs with the fabricator before the order. Verification of the result is by TDR impedance testing for the electrical behaviour and by eye diagram measurement for the channel, since the eye diagram is where the benefit of removing the stub resonance most clearly shows up.

Manufacturing Sequence

• Multilayer lamination of the full stack.
• Through hole drilling of the vias that will be back drilled.
• Copper plating of the barrels, to the specified thickness.
• CNC controlled depth back drilling from the opposite side, removing the unused barrel portion.
• X-ray alignment verification to confirm the drill met the existing holes concentrically.
• Stub measurement by cross section or a comparable inspection method.
• Electrical test and the rest of the standard fabrication flow.

Two things in that sequence are unusual for a PCB process. The controlled depth drilling is a mechanical operation with a tolerance measured in thousandths of an inch, and the verification is destructive or semi destructive rather than a simple continuity check. Both require equipment and process experience that a general purpose fabricator may not have. The same is true of the plating and lamination control that precede it, which is why the capability tends to sit with suppliers who already run high layer count or high speed work as part of their PCB manufacturing repertoire.

Capability to Look For

As a current reference for what a capable high speed shop offers:

• Maximum layer count: up to thirty two layers.
• Board thickness range: roughly 1.0 to 6.5 mm.
• Minimum drilled hole: around 0.15 mm.
• Residual stub control: 5 mil or less on advanced work, with 8 mil as the standard high speed target.
• Materials: FR-4 and low loss laminates, including the mainstream high speed material families.
• Impedance accuracy: within about plus or minus five percent.

The material range is worth checking separately. Removing a stub changes the resonant behaviour of a via; it does not reduce the dielectric loss of the laminate. A high speed channel usually needs both, so the ability to process low loss material is a prerequisite for meaningful back drilling work.

Cost

Back drilling generally adds eight to fifteen percent to the cost of the board, and that premium is usually recovered by avoiding the alternative of a fully blind and buried via construction or a redesign after a signal integrity failure.

Prototype reference bands: an eight layer back drilled board typically runs 180 to 350 dollars, a twelve layer board 400 to 800 dollars, and a sixteen layer high speed board 900 to 1,800 dollars. At volume above a thousand pieces, the same constructions commonly land around 35 to 70 dollars, 80 to 150 dollars, and 160 to 320 dollars respectively. The spread is driven by layer count, board thickness, drilling precision and quantity, with thickness having a larger effect than usual because it directly determines how hard the depth tolerance is to hold.

Lead Time

• Prototype: seven to ten working days.
• Medium batch: two to three weeks.
• Large batch: three to five weeks.

The back drill step itself does not dominate the schedule; the multilayer construction and the material do. Planning should assume the standard high layer count timeline rather than treating back drilling as a quick add on, particularly where low loss laminate has to be ordered in.

Risks

• Misregistration causing the drill to miss the via centre, which removes more copper than intended on one side.
• Over drilling that damages the layer the signal connects to, which usually appears as an intermittent open rather than an obvious fault.
• Insufficient stub removal, leaving the resonance the operation was meant to eliminate.
• Stackup and impedance assumptions that do not match the built board, which is a design problem rather than a drilling problem but produces the same symptoms.

Mature high speed manufacturing experience is the practical mitigation for all four. The evidence to ask for is cross section data showing measured residual stubs and a demonstrated depth control figure.

Frequently Asked Questions

What is a back drilled PCB? A multilayer board where a second controlled depth drilling operation removes the unused portion of through hole via barrels after plating, reducing the stub that would otherwise degrade high speed signals.

When is back drilling necessary? When the signal rate is above about 10G, or when the stub length exceeds roughly 10 mil and simulation shows a resonance risk. At 25G and above it is generally expected.

How short can the residual stub be? Modern high precision processing holds five to eight mil or less, depending on the system speed and the board thickness.

How much does it add to the board cost? Typically eight to fifteen percent, which is usually less than the cost of the blind and buried via alternative or of a late signal integrity fix.

What confirms the result? Cross section measurement of residual stub length, X-ray verification of drill alignment, and TDR impedance measurement on coupons, supported by eye diagram evaluation of the channel.

Summary

A via stub is an unterminated transmission line branch, and above 10G it stops being a detail. Back drilling removes it with a second controlled depth drilling operation after plating, holding the residual stub to five to eight mil and removing the resonance that would otherwise show up as reflection, loss and a closing eye.

It is the economical answer for most high speed multilayer boards, delivering signal integrity close to a blind and buried via construction for roughly fifteen to thirty percent less cost, and it works across the eight to thirty two layer range with conventional lamination.

What it demands is process control. Depth tolerance of a few thousandths of an inch, X-ray registration against the original vias, and verification by cross section are the capability requirements, and they are the reason the work belongs with a supplier who already builds high speed boards. The design side is straightforward once the layering, the stub target and the DFM notes are stated clearly: specify the layers, give a number for the residual stub, and let the fabricator confirm the stackup can deliver it.