Characteristic Impedance and Controlled Impedance Boards

At low frequencies a trace is a wire, and the only things that matter are its resistance and where it goes. As the edge rates of the devices rise, the trace becomes a transmission line, and the quantity that describes it, the characteristic impedance, is what the design rules are written around.

This article explains what a transmission line is on a board, what characteristic impedance means physically, and why a controlled impedance board is specified as a range of values that has to be held along the whole route.

What a Transmission Line Is

A transmission line is two conductors of some length, one carrying the signal and the other returning it. On a multilayer board every signal trace is part of such a pair, with the nearest reference plane acting as the second conductor.

The word to be careful about is return. The second conductor is not simply ground in the abstract; it is the conductor that the current actually returns through, and its proximity and continuity are what determine how the line behaves. A trace with no defined return path is not a controlled transmission line at all, whatever its dimensions.

What Characteristic Impedance Means

Characteristic impedance is the ratio of voltage to current for a wave travelling along the line. It is not a resistance that dissipates energy, and it cannot be measured with an ohmmeter; it is a property of the geometry that describes the relationship between the voltage wave and the current wave that accompanies it.

The value depends on the width of the trace, its height above the reference plane, the thickness of the copper and the dielectric constant of the material between them. That is why the impedance of a net is decided by the stack-up and the routing, and why the same trace width produces different impedances on different layers of the same board.

Propagation: Charge Moving at a Finite Speed

When a voltage is applied to one end of a line, the wave does not appear at the other end instantly. It travels at a speed set by the dielectric, typically around six inches per nanosecond in the materials used for boards, so a step at the driver reaches the receiver after a delay proportional to the length of the trace.

The wave propagates because each successive segment of the line has to be charged to the new voltage before the segment ahead of it can change. The current that flows during that process is the current drawn from the driver, and the ratio of the voltage step to that current is the characteristic impedance. Where a discontinuity in geometry is met, part of the wave is reflected, and the reflection returns to the driver.

Controlled Impedance Boards

A board is described as controlled impedance when every specified net is built to a target impedance within a stated tolerance. The targets are chosen by the interface standard, and the range that the process can hit comfortably lies roughly between twenty-five and seventy ohms for single-ended traces on ordinary constructions.

The requirement is not an average. A trace that changes width, that passes over a plane that has been split, or that changes layer without a return via will present a different impedance along that section, and the reflection from the change is what the tolerance exists to limit. The difference between microstrip and stripline routing is the clearest example, because the same width gives two different results depending on where the layer sits in the stack.

Tolerance, Continuity and Layer Changes

Impedance tolerance is quoted as a percentage, and it applies to the fabricated board rather than to the layout. The fabricator achieves the target by controlling the dielectric thickness and the trace width, both of which have their own tolerances, which is why the specification and the measurement are made together.

Continuity is the designer’s half of the problem. A route that changes width to fit between two pads, that crosses a gap in its reference plane or that changes layer without an accompanying return via has a discontinuity, and each of them sends part of the signal back toward the driver. Keeping the geometry constant along the net matters more than achieving the target exactly.

Differential Pairs and Their Impedance

A differential pair has its own impedance, defined between the two conductors rather than between either of them and a plane, and it is usually specified at twice the single-ended value. Coupling between the two traces is part of the geometry, so the spacing within the pair has to be held as carefully as the width, and the pair has to be routed over a continuous reference.

The pair also has to be routed with equal length, because the whole point of the arrangement is that the two signals arrive together and any common-mode disturbance is rejected. Where a pair must change layer, both traces change together and both are given return vias.

Specifying Impedance on the Fabrication Drawing

The drawing has to state which nets are controlled, which layer each of them is on, the target value and the tolerance, and it has to be accompanied by a stack-up that makes those values achievable. A target quoted without a stack-up is a request for the fabricator to choose both, which is how a board ends up with a stack the designer did not intend.

The consequence reaches further than impedance. The dielectric thickness that sets the impedance also sets the attenuation, and where a design has to support long high-speed links the selection of a low-loss laminate becomes part of the same decision. The layer arrangement itself is described under stack-up planning.

Verifying the Result

Verification is done by a coupon. A test pattern with the same geometry as the design is built alongside the panel, and its impedance is measured with a time-domain reflectometer. What the coupon shows is whether the process produced the geometry that the calculation assumed, and it is the evidence that accompanies the panel.

The designer’s verification is different. It consists of checking that every controlled net held its width, that no reference plane was crossed, and that the layer changes are accompanied by returns. Signal propagation along a net is only as predictable as the geometry along its whole length, and that is a property of the layout rather than of the measurement.

FAQ

Does every net need a controlled impedance? No. The requirement applies to nets whose rise time is short compared with the delay along them, and to nets whose specification comes from an interface standard. A slow signal on a short trace does not need one.

Can a controlled impedance be achieved on an ordinary stack? Yes provided the stack was planned for it. The fabricator adjusts trace width and dielectric thickness together, and a target that the stack cannot reach is a sign that the stack needs revisiting.

What happens if the reference plane is split under a trace? The return current has to detour, which enlarges the loop and changes the impedance locally. The signal still arrives, and the reflection and the emissions that come with it are the cost.