Chip on Board Assembly Design Guide

Chip on board places a bare semiconductor die directly on the printed circuit board, connects it with fine wires and protects it with a blob of encapsulant. It removes the package from the assembly, which saves space and cost in high volume products, and it removes the ability to replace the device if anything goes wrong.

What Chip on Board Means

The die is supplied without a package, so the board itself becomes the package. It is attached to a pad with an adhesive or a solder layer, connected to the circuit with wire bonds or with flip chip bumps, and then covered with an encapsulant that protects the wires and the surface of the die.

The technique is used in consumer electronics, in smart cards, in camera modules and in displays, where the space saved by removing a package is worth the process complexity. It is also used where a standard package does not exist, such as with a custom or an unusual die.

Chip on board is different from a chip scale package, which also shrinks the package but leaves a component that can be placed by standard assembly equipment. A chip on board assembly requires a wire bonder or a flip chip bonder, and the process steps are specific to the manufacturer, which means fewer suppliers and less flexibility.

When the Technology Makes Sense

The economics favour chip on board at high volume. The die itself is cheaper than the packaged part, but the assembly process has additional steps, additional equipment and additional inspection, and the fixed cost of setting up the process has to be spread over a large number of units.

Where the requirement is space rather than cost, the decision is easier. Removing a package saves the package footprint, the clearance around it and the height above it, which matters in modules where every cubic millimetre counts. The same applies where the interconnect length has to be minimised for electrical reasons.

The technology is a poor fit for low volume production, for designs that may need to change, and for equipment that has to be repaired. A die that is encapsulated cannot be replaced, so a board that fails after assembly is scrap, and the yield of the whole line becomes the yield of the assembly rather than of the individual components.

Die Attach and Its Requirements

die attach fixes the die to the board and provides part of the thermal path. Adhesive attach uses an epoxy that is cured after placement, while solder attach uses a metal layer on the back of the die and a solder alloy that is reflowed. Solder gives a lower thermal resistance and adhesive gives more compliance, and the choice follows from the power dissipation and the thermal cycling.

The attach layer must be void free and uniform in thickness. A void under the die creates a hot spot, and a thick bond line adds thermal resistance. Both are controlled by the placement accuracy, the volume of material dispensed and the cure or reflow profile, and both are verified by X-ray inspection on a sample basis.

coefficient of thermal expansion differences between the die, the attach material and the board produce a shear stress on the attach layer at every temperature change. The attach material is chosen partly for its ability to absorb that stress, and the die size matters because the stress at the corner of a large die is greater than at the corner of a small one.

Wire Bonding and Pad Design

wire bonding connects the die pads to the board pads with gold or aluminium wire, typically twenty to fifty micrometres in diameter. The bond is made by a combination of heat, pressure and ultrasonic energy, and the pad surfaces have to be clean and compatible with the process. Gold wire on a gold plated board pad is the usual combination.

The board pads have to be designed for the bonding process rather than for reflow. Pad size, pad pitch, plating thickness and surface finish all affect the bond strength, and the wire loop height and direction have to be accommodated in the layout. Bonding in a direction that requires a long loop increases the risk of the wire touching a neighbouring feature.

Flip chip attach avoids the wires by turning the die over and connecting it through bumps on the die surface. It gives a shorter electrical path and better thermal performance, at the cost of requiring underfill between the die and the board to protect the bumps from mechanical and thermal stress. Both approaches need a layout designed with the process in mind.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/pcb-assembly-services.webp" alt="Chip on board assembly with glob top encapsulation” />

Glob Top and Encapsulation

glob top is the encapsulant that covers the die and the bond wires, applied as a measured amount of a filled epoxy that flows to a defined shape and is then cured. It protects the wires mechanically, keeps contamination and moisture away from the die surface, and provides a small amount of electrical insulation.

The material is filled with silica to match its expansion to the assembly and to reduce shrinkage during cure, and the fill content affects its viscosity and its flow. Too little material leaves a wire exposed, while too much flows beyond the intended area and can cover pads or test points that are needed later.

The boundary of the glob top has to be defined in the layout. A dam of solder mask or a machined pocket stops the material from spreading, and the area reserved for it must be clear of components that would be covered. The curing profile matters as well, because a fast cure produces a higher stress on the die than a slow one.

Thermal Expansion and Reliability

The assembly is a stack of materials with different expansion rates, and every temperature cycle strains the interfaces. The largest stresses appear at the corners of the die and at the ends of the bond wires, and they accumulate over the life of the product rather than appearing immediately.

Thermal cycling tests are used to qualify the assembly, and the failure modes they reveal are characteristic. A cracked die, a delaminated attach layer and a broken bond wire each point to a different part of the process. The number of cycles survived is the qualification figure, and it depends strongly on the temperature range used rather than on the number alone.

Moisture adds a second mechanism. Absorbed water expands rapidly when the assembly is heated, and the resulting pressure can delaminate the attach layer or crack the die. The encapsulant and the storage conditions before assembly both influence how much moisture is present, which is why baking before the process is specified.

Layout and Process Constraints

The layout has to respect the process. The die area and its bond pads, the bond wire keep out, the glob top boundary and the test access all have to be defined and checked, and the rules come from the assembly house rather than from a general standard. Starting the layout before those rules are known leads to a design that has to be reworked.

Panel utilisation matters more than in a conventional assembly, because the die placement and the bonding are sequential operations with their own cost. A panel that carries many identical circuits amortises the setup, and a design that is only a few millimetres smaller may allow an extra column on the panel. The production flow and its cost structure are described in PCB production process flow.

Test access is the constraint that is most often forgotten. Once the die is covered, the only way to test the circuit is through the pads that remain exposed, so the design should include test points for every net that has to be verified. Providing them on the reverse side of the board is a common solution, and the documentation practices in PCB fabrication notes checklist help to make the requirements explicit to the manufacturer.

Testing, Yield and Rework

In circuit testing before encapsulation is possible while the die is still accessible, and it is the best opportunity to catch a defective bond. Probing the die pads directly risks damage, so the usual approach is to test through the circuit rather than at the die, checking that each function responds as expected.

After encapsulation, testing is limited to functional checks at the assembly terminals. That means the yield of the whole process has to be high, because a failure at this stage costs the die, the assembly time and the board. Tracking the yield of each process step, rather than only the final figure, shows where the effort should be directed.

Rework is generally not possible, and attempting it usually damages the board beyond repair. The practical approach is to design for a high first pass yield and to treat any failure as a process investigation rather than as a repair. The inspection practices that catch problems early, rather than after encapsulation, are covered in our guide to judging PCB quality.

FAQ

Is chip on board cheaper than a packaged part? At high volume, often yes. At low volume the process setup dominates, and a standard package is cheaper as well as easier to replace.

Can a chip on board assembly be repaired? Practically, no. Removing the encapsulant and reworking the die usually damages the board, so the design has to achieve a high first pass yield.

Why is underfill needed for flip chip? It distributes the mechanical and thermal stress that would otherwise concentrate on the bumps, and it keeps moisture and contamination away from the die surface.