Copper Thieving for Even Plating and Etching

Copper thieving is one of those features that appears on a finished board without anyone asking for it, and it is usually the difference between a panel that plates evenly and a panel whose traces vary from one edge to the other. This article explains what the pattern is, why fabricators add it, where it can safely go and where it must not.

What Copper Thieving Is

Copper thieving is non functional copper placed on a circuit board to make the distribution of copper more even across the panel. It carries no signal and is not connected to any net. Its only job is to change how the plating current and the etchant behave around it.

The name comes from the plating tank. Current flows from the anode to the panel, and a large area of copper gives the current more surface to flow into, so local current density drops. Where copper is sparse, the same current crowds into a small area and the deposit grows faster. Thieving is copper that deliberately takes current away from the crowded places, and it earns its name by acting as a thief of plating current.

You will see it as rows of small dots, a crosshatch grid or narrow bars in the empty areas of a board, usually on the outer layers. More often than not the designer never asked for it. The fabricator adds it during CAM preparation because the copper density on the design is uneven enough to threaten the process window.

Why Plating Uniformity Matters

Every current carrying feature is defined by a copper thickness, and that thickness is set by three things: the base foil, the plating that follows drilling, and on the outer layers the plating that comes with the surface finish. Of those, the plated copper is the one that varies most across a panel.

On a board with a large ground plane on one side and a sparse digital section on the other, the plane can plate to 25 micrometres while the sparse area reaches 40 micrometres, because the same current has far less surface to cover. That is a 60 percent spread on a nominal target, and it has real consequences. The sparse side may fail a minimum thickness requirement while the dense side sits comfortably inside it, so the whole panel has to be plated longer to lift the thin areas, which wastes copper and time and can push the dense side past the upper tolerance.

The variation also affects geometry. Extra plating closes the gap between traces at the same time as it thickens them, so a fine pitch area on the sparse side of a panel may come out with narrower gaps than the design allows. Etching has the same problem in reverse. Where copper density is high the etchant is depleted locally and the etch runs slower, leaving traces wider than intended; where copper is sparse the etch runs faster and the traces are attacked from the sides, so they come out narrower with more undercut. Thieving evens the density so a 0.1 mm trace on one edge etches at the same rate as a 0.1 mm trace on the other.

There is a third effect that has nothing to do with current. Lamination is a balance of copper and resin on both sides of a core. If one side of a large panel is mostly copper and the other is mostly bare laminate, the cured board bows. Inner layer thieving is the usual fix.

Where Thieving Goes and How It Is Sized

Thieving is placed where no signal will travel: in the open laminate between circuit blocks, in the rail strips at the panel edge, in areas reserved for label or barcode marking, and in the gaps left by a connector or a mounting hole. The rule of thumb is simple. If there is a square centimetre of bare laminate that is not needed for a mechanical feature, it is a candidate.

Dot patterns are the most common form. A typical pattern uses round pads of 0.75 mm to 1.5 mm on a 1.5 mm to 2.5 mm grid, which raises the local copper density to roughly 30 to 50 percent so that it matches the average density of the circuit areas. Crosshatch or mesh patterns are used where the thieving covers a large area and air must not be trapped under a conformal coating or a heatsink.

The critical rule is clearance. Thieving is floating copper, so it has to be kept away from anything that cares. A clearance of at least 0.5 mm from any signal trace, pad or via is normal, and more where the voltage is high. On controlled impedance layers the distance matters electrically as well, which is why thieving is generally kept off the reference plane of an impedance controlled trace, or pulled back to a distance that is large compared with the dielectric thickness.

Thieving, Ground Pour and Dummy Pads

These three are often confused because all of them look like extra copper, so it is worth separating them.

A ground pour is connected copper. It is tied to a ground or power net, it is part of the electrical design, and it changes the impedance, the return path and sometimes the thermal behaviour of the circuit. A designer places a pour on purpose. A fabricator adds thieving as a process aid.

Dummy pads are copper that exists for a specific manufacturing step rather than for density balance. A dummy pad might give a pick and place machine a feature to sense, support a stencil, or carry a copper thickness measurement coupon. They are few and local rather than a repeating pattern.

The practical difference shows up in the CAD data. Thieving should be created on a separate layer or with a distinct aperture so it can be identified and removed, and so it cannot be mistaken for circuitry during electrical test. A fabricator who merges thieving into the signal layer without tagging it makes the netlist review harder, and a designer who cannot tell which copper on the finished board is functional has lost control of the design.

Effect on Electrical Performance

Floating copper is still metal, so it is worth being precise about what it can and cannot do. It will not carry a DC net, because it is not connected to anything. It does couple capacitively to whatever is nearby, and if it lies in the field of a controlled impedance trace it adds a small amount of distributed capacitance, which lowers the impedance slightly.

In practice this matters only when the thieving comes close to the trace. Keeping the pattern several dielectric thicknesses away from an impedance controlled line, and off the reference plane of that line, removes the concern for ordinary digital and analog designs. RF boards are treated separately, with the pattern reviewed alongside shielding and stitching.

There is also a thermal angle. Isolated copper does not sink heat away from a component, because there is no path to a plane. Thieving is therefore not a substitute for a thermal via array or a copper area on a net, and it should never be assumed to help with heat.

Design and Fabrication Rules

• Keep thieving at least 0.5 mm from traces and 1 mm from high voltage nets, with larger clearances as the voltage rises.
• Do not place patterns inside impedance controlled regions or on a reference plane face.
• Keep the pattern out of areas that will be coated, bonded or used as a gasket surface, so it does not trap air or create a thickness step.
• Tag the thieving on its own layer and mark it as non functional, so it can be regenerated or removed.

Fabricators who generate thieving automatically will size the pattern from the copper density they measure in CAM, and they will usually add it to the outer layers and to inner layers where the copper balance is poor. Because it is a process decision, the same design sent to two suppliers may come back with different thieving. That is why a stackup drawing should state the copper balance requirement rather than the pattern.

Cost and When to Ask for It

Thieving costs very little in copper and almost nothing in labour, because it is added in CAM and imaged with the same artwork step. The cost appears indirectly as a slightly longer plating cycle on panels that need heavy plating, and the savings from a wider process window usually offset the added copper. On a board with fine lines and thin plating, the increased process window is worth far more than the copper.

It is worth requesting by name when a panel has strongly uneven copper, when the minimum trace width is aggressive, when the panel is large and thin and warpage is a concern, or when an incoming copper thickness measurement has come back outside tolerance. It is not worth chasing on a dense board where the density is already even and the process window is comfortable.

Two commercial notes are worth keeping in mind. Thieving turns the copper weight on the drawing into an average rather than a local number, so the requirement belongs on the drawing as a thickness range measured on a coupon. On heavy copper work the thieving pattern is often part of the quoted process, because a 3 oz or 4 oz plated layer is far less tolerant of uneven current density than a 1 oz layer, and the supplier will quote the balance requirement as a line item. Buyers who compare two quotes on a heavy copper board without comparing the copper balance requirement are not comparing the same process.

For the ordinary case, the safe position is to let the fabricator add thieving, to give it clear space from functional features, and to check with the capabilities review whether the supplier tags the pattern as non functional copper before the panel is released. A quote that mentions copper balance explicitly is usually a sign the supplier has looked at the density spread rather than only at the layer count.

FAQ

• Does thieving change the impedance of my traces? Only if it sits close to them. Keep it several dielectric thicknesses away and off the reference plane, and the effect is negligible.
• Is thieving the same as a copper pour? No. A pour is connected to a net and is part of the circuit. Thieving is floating copper added for process reasons.
• Can I ask for thieving to be removed? Yes, but if the copper distribution is genuinely unbalanced, removing it moves the risk back into plating and etching rather than removing it.
• Where does thieving go on a four layer board? Usually on the outer layers in open areas, and on inner layers when the copper balance between layer pairs is uneven.
• Do I have to draw the pattern myself? No. Most suppliers generate it in CAM. Drawing it yourself is only useful when you need control over clearance or over where the pattern must not appear.

Summary

Copper thieving is a process feature rather than a design feature. Its purpose is to make copper density even so that plating thickness, etch rate and lamination stress behave the same everywhere on the panel. Placement is a matter of clearance rather than of circuit design: keep it away from traces, impedance controlled regions, high voltage nets and bonding surfaces, and tag it so everyone can see that it carries no net.

Request it when the copper distribution is uneven or the process window is tight, and accept it when the supplier adds it during fabrication, because the alternative is a board whose trace width and plating thickness depend on where on the panel the features happened to land.