Wrong Footprint, Wrong Board: Package Selection Mistakes

A wrong footprint is one of the few design errors that survives every automated check, looks correct on screen and is guaranteed to cost money. The schematic is right, the netlist comparison passes, the design rule check is clean, and the board still cannot be assembled because the pads do not match the part. Understanding how these errors happen is the most reliable way to prevent them.

How a Wrong Footprint Happens

The most common route is a library part that was created from a similar device rather than from the specific data sheet. A part number with a suffix change, a different package variant of the same silicon, or a supplier’s equivalent that is dimensionally different all produce a footprint that looks familiar and is wrong. The error is invisible until the assembler tries to place the component.

The second common route is a datasheet revision. Land pattern recommendations change, thermal pad dimensions are corrected and package outlines are updated, but the library part that was created two years ago is rarely revisited. Libraries drift out of date quietly, and the drift is only discovered when a new design uses an old part.

Pin Numbering and Symbol Mapping

The electrical error that accompanies footprint mistakes is pin mapping. A package may number its pins differently from the schematic symbol that was drawn for it, especially where a device exists in both a leaded and a leadless version. If the symbol was copied from the wrong variant, the board will connect the right nets to the wrong physical pins and the fault will appear as a functional failure rather than a layout error.

The check that catches this is a visual one: place the proposed land pattern beside the data sheet drawing and compare pin one position, numbering direction and the location of any missing or duplicated pins. Automated checks cannot do this, because the library part is internally consistent and simply describes a different component.

Land Pattern Versus Data Sheet Drawing

Recommended land patterns are not the same as package outlines. The drawing shows the component, while the recommended pattern accounts for solder fillet, inspection access and process capability. Copying the component outline directly into the library produces pads that are too small, which then leads to weak joints and to opens that appear after thermal cycling.

Most manufacturers publish a recommended pattern, and IPC standards give a formula for deriving one from the package dimensions. Where they disagree, the manufacturer’s recommendation usually reflects the component’s own mechanical behaviour. Our notes on PCB pad design standards describe the geometry that a land pattern has to satisfy, including the annular and fillet requirements that a copied outline will miss.

Thermal Pads, Exposed Pads and Paste

Exposed pad packages add a second source of error. The thermal pad has to be soldered for both electrical and thermal reasons, which means it needs a paste pattern and often a via array beneath it. A footprint that includes the pad but no paste strategy produces a component that is held by the leads alone, with a thermal path that is far worse than the design assumed.

Vias inside the pad area need to be tented, plugged or placed to avoid wicking solder away from the joint. The paste pattern for a large pad is usually divided into a grid of smaller openings rather than one large area, because too much paste causes floating and bridging. Our discussion of stencil aperture and placement tolerance covers how the paste volume interacts with the rest of the process.

Package Variants That Share a Name

Package names are less precise than they look. Two devices described as the same outline may differ in lead pitch, body length, thermal pad size or the presence of a chamfer that determines orientation. Tape and reel orientation adds another variable, since the same part can be supplied rotated, which matters when the placement program relies on pin one being in a known position.

The practical defence is to record the full manufacturer part number in the bill of materials and to link the library part to the specific data sheet revision it was created from. A library entry with a reference is auditable; one without a reference is a rumour.

Verification: Prints, Models and Test Boards

Three cheap checks catch most footprint errors. Printing the land pattern at one to one scale and placing the physical component on the print costs a sheet of paper. Importing the three dimensional model and checking it against the mechanical envelope catches height and clearance problems. Building a small test board with the new packages before committing the full design catches everything else.

These checks belong in the review, and our outline of layout verification methods places them before fabrication rather than after. The cost of a test panel is trivial compared with the cost of a production batch that cannot be assembled.

Second Source and Lifecycle Risk

A footprint decision also has a supply chain dimension. Choosing a package that only one manufacturer offers creates a risk that the part becomes unavailable, and the substitute is rarely the same shape. Where a second source exists, its land pattern recommendation should be checked against the first, because two sources of the same nominal package can differ in ways that matter to the paste print.

Where the design uses a very small package or an unusual land pattern, confirm that the assembler’s process can place and inspect it before the board is released. Some footprints are manufacturable in principle and impractical in the specific line that will build the product, and that is discovered much more cheaply at the design stage than at the assembly stage.

Process Control and Verification

Reviewing the design before the data is released is far cheaper than correcting it after the panel is in the tank, because every step downstream inherits the decision made at the front end. Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance.

The measurements that matter are the repeatable ones: conductor width and spacing, annular ring, finished hole size, plating thickness and surface finish are all verifiable on a coupon that travels with the panel. Documenting the assumption is part of the design work, and a short note on the drawing prevents a question that would otherwise arrive a day later and cost a day of schedule.

Where a value sits close to a process limit, the drawing should say so, since the shop can then open the process window rather than working to a nominal figure that carries no tolerance. Running a first article through the same checks as the production panel confirms that the two agree, and that comparison is the cheapest form of process control available at prototype stage.

FAQ

Why did the netlist check not catch the error? Because the netlist check compares the layout with the schematic, and both described the same incorrect footprint. The error is a mismatch between the library part and the physical component, which no comparison inside the design database can detect.

Is the manufacturer’s recommended pattern always right? It is the best starting point, because it reflects the component’s own mechanical design. It may still need adjustment for a specific assembly process, particularly for paste volume on large thermal pads, and that adjustment should be agreed with the assembler and documented.

How often should libraries be reviewed? At least when a part is used in a new design, and periodically for parts used repeatedly. A short review that compares the current data sheet with the library entry, and records the date, is enough to prevent most of the drift that causes these errors.