Hot Swap Controller and Inrush Limiting

Plugging a board into a live backplane is an electrical event, not just a mechanical one. The bulk capacitance on the new board charges from the backplane in a few microseconds, and the current that flows is limited only by the impedance of the connectors and the wiring. A hot swap controller turns that event into a controlled ramp and protects the bus when something goes wrong.

Why Hot Swap Protection Is Needed

The backplane already carries other boards and a power supply that has a defined current limit. An uncontrolled plug in event draws a surge that can dip the bus below the operating voltage of the boards already running, trip the supply protection, or damage the connector contacts through arcing and heating.

The new board also has to be protected from itself. A fault on the newly inserted board, such as a shorted capacitor or an incorrectly fitted component, would otherwise draw full bus current through a connector that is not rated for it. The controller isolates that fault and reports it, so the rest of the system continues to run.

The third case is a real short circuit on a board that is already running. Without protection, the fault current is limited only by the supply, and the damage spreads. With protection, the fault is detected, the current is limited for a defined period and the board is disconnected.

The Hot Swap Controller Function

The controller sits in series with the supply to the board and drives a MOSFET that acts as a controlled switch. It measures the current through a sense resistor, limits the gate voltage so that the current stays within a defined value, and ramps the gate up slowly so that the board capacitance charges without a surge.

The device also monitors the output voltage. When the MOSFET is fully enhanced and the output is close to the input, the controller asserts a power good signal, which the rest of the board uses to release its own reset. That interlock prevents a processor from starting while its supply is still rising through a MOSFET in its linear region.

The controller usually requires a small number of external components: the MOSFET, the sense resistor, a gate capacitor that sets the ramp, and a resistor divider that sets the under voltage and over voltage thresholds. The values are chosen from the load behaviour of the board rather than from the controller itself.

Inrush Current and Slew Rate Control

inrush current is set by the output capacitance and by the rate at which the output voltage is allowed to rise. A board with a hundred microfarads of bulk capacitance charged in one millisecond draws a hundred milliamperes of average charging current, but the instantaneous current at the start of the ramp is much larger unless the ramp is controlled.

Ramping the gate slowly keeps the MOSFET in its linear region for the duration of the charge, so the current is limited by the transconductance of the device and by the gate voltage rather than by the loop impedance. The gate capacitor sets the ramp rate, and the controller holds the gate current constant so that the output voltage rises linearly.

The trade is the stress on the MOSFET. A slow ramp means the device spends longer in its linear region, dissipating the product of the drain voltage and the drain current. The energy is roughly equal to the energy stored in the output capacitance, and it has to be within the safe operating area of the device for the duration of the event. Our article on power integrity describes how that energy and the bulk capacitance relate to the rest of the design.

Current Limit and Fault Behaviour

current limit is the value the controller holds the current to while the output is ramping or while a fault persists. It is set by the sense resistor and by an internal threshold, and it has to be above the maximum operating current of the board with margin for tolerance and temperature, and below the rating of the connector and the traces.

When the current limit is reached, the controller has several options. It may hold the current at the limit indefinitely, which is called a constant current mode; it may latch the output off after a defined time; or it may retry after a delay. The choice follows from the application: a board that may see a temporary overload benefits from retry, while a board with a fault that must not be repeated benefits from latching.

The behaviour during the fault is what the system sees if something goes wrong, so it should be defined and tested rather than left to the default. A retry that repeats rapidly heats the MOSFET, while a latch that never retries leaves the system down until it is serviced. Neither is wrong, but the choice should be deliberate.

MOSFET Selection and Safe Operating Area

The MOSFET has to survive two conditions: continuous conduction at the board operating current, and the linear mode event during the ramp. The continuous requirement is met by a device with a low on resistance, while the transient requirement depends on the safe operating area curve, which shows the combinations of voltage, current and time the device tolerates.

A device chosen only for its on resistance may fail during the ramp, because a small package with a high current rating often has a narrow safe operating area. Reading that curve at the actual drain voltage and ramp duration is the check that prevents the failure, and it is a check that many designs skip.

The gate drive requirement is modest, since the controller supplies the gate current and the device only has to be enhanced fully at the end of the ramp. What matters is the gate charge, because a large gate charge lengthens the ramp for a given gate current and increases the energy dissipated in the device.

Sense Resistor and Threshold Accuracy

The sense resistor sets the current limit, and its accuracy determines how much margin the design needs. A resistor with a one percent tolerance and a low temperature coefficient keeps the limit stable, while a poor part produces a limit that varies with temperature and forces a larger margin between the operating current and the limit.

The measurement is a differential voltage of a few tens of millivolts across the resistor, so the layout around it matters as much as the value. The sense connections must be taken from inside the current path and matched, because an asymmetric tap adds a gain error that changes the limit in a way that is not obvious from the schematic.

Where the board current is large, the power dissipated in the sense resistor becomes significant. The resistor heats, its value changes, and the current limit moves with it. A part with a low temperature coefficient and a rating well above the dissipation keeps the limit stable, and the copper around it should be sized to carry the current and remove the heat, as described in current capacity.

Layout of the Hot Swap Path

The hot swap path carries the full board current, so the traces, the MOSFET, the sense resistor and the connector should be arranged in a straight line with the shortest possible connections. Every milliohm of trace resistance adds to the drop between the backplane and the board, and at twenty amperes a milliohm is twenty millivolts of loss.

The gate drive components belong close to the controller and to the MOSFET gate, because a long gate connection slows the ramp in an uncontrolled way and can oscillate with the gate capacitance. The general layout rules for a switching stage, described in switching regulator layout, apply to the gate circuit even though the hot swap MOSFET switches far more slowly.

Thermal relief for the MOSFET is part of the layout. The device spends almost all of its time fully enhanced, dissipating very little, but during a fault it dissipates for as long as the controller allows. Copper area under the drain tab and a grid of vias into the plane give the device somewhere to put the heat during those events.

Verification and Common Faults

Verify the design by inserting the board into a live backplane with a current probe on the supply and a scope on the output voltage. The trace should show a linear ramp with the current held at the limit, followed by a transition to full enhancement. A ramp with a step in it indicates that the gate capacitor or the loop is not behaving as designed.

Test the fault behaviour by shorting the output and observing what the controller does. The current should be limited, the fault should be reported, and the device should survive the event at the maximum input voltage and the maximum ambient temperature. A test at room temperature with a nominal input proves very little about the safe operating area.

A board that works when inserted slowly and fails when inserted quickly usually has a contact bounce problem. The connector contacts make and break several times during insertion, and a controller that does not debounce the under voltage input may start several ramps in quick succession, each one depositing energy in the MOSFET. Adding hysteresis or a delay to the under voltage threshold removes the problem.

FAQ

Can I use a simple resistor instead of a hot swap controller? A resistor limits the inrush but drops voltage during normal operation and does not protect against a fault. It is acceptable only for very low currents.

How do I choose the ramp rate? Set the gate capacitor so that the inrush current stays within the connector rating while keeping the MOSFET inside its safe operating area for the duration of the ramp.

Why does the controller trip when the board is inserted? Either the current limit is set too close to the inrush peak, or contact bounce is restarting the ramp. Check the current probe trace and the under voltage input for repeated transitions.