IC Substrate: How Package Substrates Differ From PCBs

An IC substrate is the small board inside a chip package, and it is made with the same family of processes as a PCB while being a different product in almost every respect. It exists because a silicon die and a printed circuit board cannot be connected to each other directly at a reasonable cost, and something has to bridge the gap between a pad pitch measured in tens of microns and one measured in fractions of a millimetre.

What an IC Substrate Does

A package substrate sits between the die and the motherboard. On its upper surface it carries the fine pitch sites that connect to the die, either by wire bonds or by flip chip bumps. On its lower surface it carries the coarse pitch solder balls that connect to the PCB. In between, a build-up of thin layers redistributes the die connections into the array the board can accept, delivers power to the die, and provides a controlled impedance environment for high speed signals.

Three functions are carried out by the same structure. Redistribution, which is a geometric problem: a die may have thousands of connections on a 40 to 150 micrometre pitch that have to be spread over a ball grid array on a 0.4 to 1 mm pitch. Signal integrity, because the substrate is the first transmission line a high speed signal sees outside the silicon, and its impedance and loss matter. And power delivery, because the substrate has to carry current from the package balls to the die bumps with low inductance and low resistance.

A fourth function is mechanical. The substrate provides the stiffness that the die and the solder balls require, and it has to survive the temperature excursions of assembly without warping beyond what the bump connections can tolerate.

How It Is Built

The construction is a build-up process, and it is the source of the differences from a PCB.

The core is a thin laminate, often a bismaleimide triazine or a similar resin with a glass reinforcement, or in a coreless design no core at all. Layers are added one at a time: a dielectric film is laminated on, laser drilled, plated and patterned, and the cycle repeats. The dielectric is usually a build-up film rather than a woven glass prepreg, which allows much finer features because there is no glass weave to distort the geometry.

The line widths are the headline number. A conventional PCB works in the 75 to 150 micrometre range, an advanced HDI board can reach 40 micrometres, and a package substrate is typically between 10 and 25 micrometres, with the most advanced products going below 10. Vias are laser drilled at 30 to 100 micrometres and are stacked directly on top of each other, which is why the layer count of a substrate is often higher than the number of escaping signals would suggest.

Panel size is the second big difference. Substrates are built on panels that are typically a few hundred millimetres on a side, considerably smaller than the 18 by 24 inch panels used for PCBs, and the total layer count is lower. What changes the economics is yield: at 10 micrometre lines, defect densities that are irrelevant on a PCB become dominant.

IC package substrate cross section showing build-up layers and solder balls

Types of Substrate

Substrates are usually classified by how the die is connected and by the construction of the core.

Wire bond substrates have a die attached to the surface and connected by fine wires to pads around it. The routing requirement is moderate, the pitch is larger, and the substrate carries the loop height and the wire sweep requirements as mechanical constraints.

Flip chip substrates connect the die directly through an array of bumps. They need the finest lines and the highest layer counts, because the die can place hundreds of signals anywhere on its surface rather than only around the perimeter. This is the category where the leading edge line widths appear.

Chip scale and wafer level packages occupy the low end of the size range, where the substrate may be a single redistribution layer or a very thin build-up, and where the cost is dominated by yield rather than by complexity.

System in package substrates carry several dies and sometimes passive components, so they combine fine pitch areas under each die with the routing between them and the power distribution for the whole assembly.

Coreless substrates omit the laminate core entirely and build the whole structure from build-up films, which reduces thickness and improves the electrical path but demands careful handling and a carrier during manufacture, because there is nothing rigid to hold the structure flat until the outer layers exist.

How It Differs From a PCB

The differences are worth setting out plainly, because engineers often assume that an IC substrate is simply a very advanced PCB.

  • Feature size. Substrates use lines of 10 to 25 micrometres against 75 to 150 for a PCB. The gap is large enough that none of the equipment is shared.
  • Dielectric. Build-up films without glass weave, laminated one layer at a time, rather than woven glass prepreg pressed as a stack.
  • Panel size. A few hundred millimetres per side against 18 by 24 inches or larger, which changes how a defect affects the yield.
  • Via structure. Lasered and stacked microvias, often with several levels stacked directly, against staggered or single level microvias as the PCB norm.
  • Warpage control. Much tighter. A substrate that warps beyond a few tens of microns across a package will not assemble to the die or to the board.
  • Test. Substrates are usually tested electrically while still in panel or strip form, and known good substrate testing is part of the cost of the package.
  • Standards and qualification. Package level reliability requirements, including temperature cycling, moisture sensitivity and drop performance, sit on top of the substrate specification.

The overlap between the two technologies is at the top end of the PCB world, where HDI with lasered and stacked microvias approaches the density of a simple package substrate. That overlap is real, and it is why some products that would once have needed a package with a substrate are now built with a high density board instead, particularly at low volume.

The Engineering Challenges

Four problems dominate substrate engineering, and all four follow from the small feature size rather than from the circuit.

Warpage. A substrate is a stack of films with different coefficients of thermal expansion, plus a die and a stiffener on one side. Keeping it flat through reflow and through temperature cycling requires the layer stack to be balanced and the copper distribution to be even. This is the reason substrate designs look so symmetrical, and the reason a small change in copper density can make a package unassemblable.

Yield at fine lines. At 10 micrometres, a particle that would be invisible on a PCB is a short or an open. Substrate lines are built in cleanroom conditions, and yield is managed by panel position as much as by design, since the outer areas of a panel typically yield better than the centre.

Via reliability. Stacked microvias in a build-up film see thermal stress at every level, and the interfaces between levels are where failures appear. Design rules limit how many levels can be stacked, how thick each dielectric can be, and how a stack may be combined with a through via.

Test and handling. A thin substrate with 10 micrometre lines is fragile. Transport, singulation and assembly all risk damage, and the test method has to confirm the substrate is good before an expensive die is attached to it.

When an HDI PCB Is Enough

Not every dense design needs a package substrate, and the decision is usually about scale and volume.

A package substrate makes economic sense when the die pad pitch is too fine for any board process, which in practice means flip chip with a dense bump array, or when the package is a standard product built in very large quantities. For moderate quantities, or where the die is wire bonded to a coarse array, an advanced HDI board with stacked microvias can carry the routing directly, and the product avoids the cost of a second substrate, a second assembly step and a second set of yield losses.

The trade-off is set by line width and panel size. An any layer HDI board with 40 micrometre lines can handle a moderate bump pitch, but a die with thousands of connections at 50 micrometre pitch is not routable on a PCB no matter how many layers are used. In between there is a range where both approaches work, and the decision then comes down to volume, cost and the supplier capability that is actually available.

It is also worth noting that the two technologies are converging rather than diverging. PCB fabricators are adopting semi additive processes that push PCB lines below 40 micrometres, while substrate makers are adopting panel formats that lower the cost per unit area. Where the boundary sits in a few years will depend on which of those two developments moves faster, and buyers planning a product with a multi year life should expect the boundary to move during the life of the design.

PCB manufacturing process

FAQ

  • Is an IC substrate a PCB? It is made with related processes, but the feature sizes, materials, panel sizes and reliability requirements are different enough that it is a separate industry.
  • What is the difference between a substrate and an interposer? An interposer usually carries no package balls and connects two or more dies or a die and a substrate. A substrate connects the die assembly to the board.
  • Can a PCB house build a substrate? Only a few, and only at the coarse end of the substrate range. The equipment and the cleanroom requirements are different.
  • Why are substrates so expensive? Low yield at fine feature sizes, tight warpage control, and a small number of suppliers with the required process capability.

Summary

An IC substrate bridges the gap between die pad pitch and board pitch, and it does so with build-up construction, lasered stacked microvias and line widths an order of magnitude finer than a PCB. It also has to deliver power, control impedance and stay flat enough to assemble, which is why its design rules are dominated by warpage and yield rather than by routing alone.

For most products the question is not whether to use a substrate but how far a board can go instead. The overlap between the technologies sits at the top end of PCB fabrication, where HDI with stacked microvias can carry connections that once required a package. Deciding which side of that boundary a product sits on is best done with the capability data of the suppliers actually available, at the volume the product will actually run, because the answer changes for a prototype, a pilot and a product shipping in millions.

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