Impedance Control in PCB Manufacturing and TDR Testing
As signal rates rise, the characteristic impedance of a trace stops being an incidental property and becomes a requirement. When the impedance along a path is not what the design intended, the signal reflects at the transition, rings, and closes the eye diagram, and the product that passed its functional tests on the bench may fail when it is measured properly. Manufacturing a board to a specified impedance means controlling the geometry and the material together, and then proving the result with a measurement.
What the Process Has to Hold
There is no single parameter that sets the impedance. The trace width and the copper thickness, the thickness of the dielectric between the trace and its reference plane, the dielectric constant of the material and the thickness of the soldermask over an outer layer all contribute, and each of them has to be held inside a range.
The trace width and the copper thickness come from the etching and the plating, and the finished width is what matters rather than the width in the artwork. The dielectric thickness comes from the lamination process, where the number of prepreg sheets and the pressing profile decide how far apart the layers end up. The dielectric constant comes from the material itself, which is why the specified grade is used and why the incoming material is verified rather than assumed.
The soldermask is easy to overlook. An outer layer trace loses a small amount of impedance once it is covered, typically in the region of three to five percent, and a calculation that ignores the coating will be optimistic. The correction is applied in the calculation rather than discovered in the measurement.

How the Control Is Organised
It begins with the engineering review. With the Gerber data and the impedance requirement in hand, the target width for each controlled trace is calculated from the factory’s own process parameters, which are the dielectric thickness, the copper thickness and the dielectric constant that this factory actually achieves. A calculation made from a general table produces a board that is correct somewhere else.
Where the width the customer has drawn does not match what the process needs, the difference is raised for discussion and a calculation report is issued for confirmation. That conversation is far cheaper before the artwork is released than after the boards have been etched.
Material control is the next gate. The grade, the nominal dielectric constant and the copper thickness are verified for each incoming batch, which matters because a change in the material moves the impedance of every controlled trace on the board at once. High frequency materials hold their dielectric constant more tightly than ordinary FR4, which is one reason they are chosen for demanding designs.
Pattern transfer and etching then determine the inner layer width, and the artwork is produced on high precision equipment with the process parameters monitored. Inspection samples the width of the controlled traces, so that a drift in the etching is corrected during the run rather than reported at the end.

Proving the Result
Once the board is finished, a TDR test is used on a test coupon placed at the edge of the panel. The instrument sends a fast step along the line and analyses the reflected waveform, which gives the impedance at each point along the trace and, importantly, shows where a discontinuity sits rather than only how large it is.
The coupon works because it is produced under the same conditions as the product. It goes through the same lamination, the same etching and the same plating, and its structures are built on the same layers, with the same widths and the same reference planes, as the controlled traces inside the board. The coupon normally sits in the waste strip at the edge of the panel, so that it shares the panel without taking space from the product.
The report states the board and the panel it came from, the date and the instrument, the target impedance and the permitted tolerance, the measured value for each structure including differential impedance where that is what the design uses, the waveform itself, and the pass or fail judgement. The waveform is the part that makes the report useful during a fault investigation, because a reading that is out of tolerance but uniform along the line points at a different cause than a reading that is correct except at one point.
Interpreting a Deviation
An impedance that measures high usually means the trace is narrower than intended, the dielectric is thicker or the copper is thinner. An impedance that measures low usually means the opposite in each case. A drift across a batch points at the material or the lamination rather than at the etching, and it is investigated through the incoming records and the pressing data.
The difference between an inner and an outer layer is a separate matter: an outer trace is covered by mask and reads slightly lower than its inner counterpart, so the two are calculated separately rather than sharing one width.
Our PCB manufacturing group produces two to twenty layer boards with controlled impedance values from fifty to one hundred and twenty five ohms at a tolerance of ten percent as standard and tighter where the design requires it, and the report travels with the shipment. Boards that continue into SMT assembly go to the line rather than back into store, and the design work that precedes the build is carried out by PCB design and layout.
What the Customer Should Supply
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The starting point is the Gerber data together with a statement of which traces are controlled and what value and tolerance each of them requires. Where the stack-up has already been fixed by the design, it is supplied as well, because the trace width and the layer spacing have to be considered together and a width that suits one stack-up will not suit another.
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Where the impedance requirement is still being defined, the discussion covers the interfaces the product uses and the material that suits them, since the choice of grade determines how much control is available. A design that needs a tight tolerance on a high speed path and a loose one on a slow path can be built with different structures on the same board, which is both more economical and more honest than applying one rule everywhere.
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Where the board will be assembled by the same group, the impedance work and the assembly are planned on one schedule, so the panels are not packed and reopened in between.
FAQ
Is a test coupon necessary? It is the only way to prove the impedance of the production board without cutting the product up, and the coupon is produced under the same conditions as the product.
Is ten percent tolerance sufficient? For most high speed digital interfaces it is, and a tighter band can be produced where the design requires it, at a cost in material and process control.
Why does the same width give different impedances at different factories? Because the copper thickness, the dielectric thickness, the etching and the mask thickness all differ, so the width has to be calculated against the process that will build the board.



