CoWoS-L Ramp and the mSAP PCB Manufacturing Shift

On August 28, 2026, equipment supplier Chipmore Microelectronics disclosed details from a recent institutional research session. PCB business revenue reached 880 million RMB in the first half of 2026, representing approximately 79.6 percent of total revenue with a PCB gross margin of about 40 percent. Its CO2 laser drilling equipment passed customer volume production validation in December 2025 and began small batch delivery during the first half of 2026. Demand for mSAP related equipment serving BT substrates and substrate-like boards has grown noticeably. The company’s wafer-level direct-write lithography system WLP2000P has been introduced at multiple advanced packaging manufacturers, and the panel-level PLP2000 has received customer orders with support for processing dimensions up to 600 by 600 millimeters. The company also stated that 2026 is a stage of concentrated CoWoS-L capacity ramp domestically, with advanced packaging related orders and revenue expected to appear more heavily in the second half.

Equipment Orders as a Leading Indicator

Equipment purchasing patterns are one of the clearest ways to observe technology migration in the PCB industry. When downstream demand is for additional conventional capacity, expansion shows up as more drilling, plating and exposure equipment of established types. When mSAP lines, two micrometer direct-write lithography, CO2 laser microvia systems and large format panel exposure tools all ramp together, the signal is different. It indicates that product structure is shifting toward HDI, substrate-like boards and advanced packaging rather than simple capacity growth.

The order pattern described by Chipmore reflects exactly that. As optical modules advance from 400G and 800G toward 1.6T and 3.2T, conventional subtractive etching runs into precision limits in high density regions. mSAP addresses this by forming a thin copper layer first and then applying pattern plating, which reduces the difficulty of producing fine lines. BT substrates, substrate-like PCBs and some high density boards are therefore adding related equipment investment. The company’s half-year report explicitly notes that AI servers, high speed networking and advanced packaging are jointly driving a substrate-like trend in PCB manufacturing.

A Continuous Technology Gradient, Not a Leap

What advanced packaging introduces is not a direct jump from conventional PCB to wafer-level interposer manufacturing. It is a more continuous gradient across different interconnect scales.

Inside advanced packaging, line dimensions can reach 10 micrometers and below. IC substrates and substrate-like boards occupy the middle level. System PCBs continue to absorb the interconnect pressure released by high speed I/O moving outward, using HDI, any-layer structures and mSAP line widths at 0.075 mm and below.

This explains why CoWoS-L capacity expansion ultimately propagates into system PCB requirements. Even after GPUs, HBM and chiplets achieve dense interconnect inside the package, the system still needs compute boards, switch boards and high speed backplanes to complete the connections. That pushes 16 to 40 layer and higher multilayer boards forward, with some AI architectures exploring 44 to 78 layer structures. At the same time, higher SerDes rates increase the need for low loss materials, back drilling and impedance control in the plus or minus five percent range on critical differential channels. Advanced packaging and PCB manufacturing are, in practice, completing the interconnect upgrade of AI computing systems together.

For the PCB industry, the practical consequence is that substrate-like capability is not a binary attribute. A manufacturer occupies some position along the gradient, and the useful question is where on that gradient it can produce repeatably. Capability in PCB fabrication spanning high layer count HDI, any-layer structures and fine line processing determines whether a program can be supported at the level it requires.

Panel-Level Packaging Connects More Manufacturing Systems

The PLP2000’s support for 600 by 600 millimeter panel processing, oriented toward CoPoS, glass substrates and FOPLP processes, deserves particular attention from the PCB industry.

Compared with conventional wafer-level approaches, panel-level packaging attempts to use larger square carriers to improve area utilization and to accommodate AI chip packages whose dimensions continue to grow. That raises the importance of exposure capability, warp compensation, line uniformity and large format manufacturing control. These are areas where PCB manufacturers have accumulated decades of experience, even if the precision levels differ.

As panel-level manufacturing expands, process commonalities between PCB, IC substrate and advanced packaging equipment increase. Large format exposure, microvia formation, fine line imaging, plating and via filling, and dimensional stability control all appear on both sides of what used to be a clear boundary. Similar capabilities are likely to spread into high speed optical modules, automotive central computing, robot controllers and semiconductor equipment electronics, where flexible and rigid-flex circuits handle spatial interconnect and heavy copper boards handle power and motor drive.

Equipment Precision Is Not the Same as Stable Production

Equipment upgrades are the starting point of manufacturing capability, not the endpoint.

Even when an exposure tool can resolve features at the micron level, entering volume PCB production still requires solving material dimensional change, microvia registration, plating uniformity, impedance consistency and downstream SMT assembly. Competition therefore does not reduce to who owns the most advanced equipment. It reduces to who can convert equipment, materials and process parameters into stable yield.

Each of those elements has a specific failure mode. Material dimensional change during lamination shifts every feature relative to the artwork, consuming registration budget. Microvia misregistration produces partial connections that survive initial test. Non-uniform plating changes via resistance and therefore impedance. Inconsistent impedance shifts high speed channel behavior in ways that may only appear at elevated temperature or after thermal cycling.

The common thread is that each problem is visible in process data long before it becomes visible in a failed board, provided the manufacturer records that data. This is where the distinction between an equipment purchase and a manufacturing capability becomes concrete. Fabrication in the 1 to 40 layer range, high layer count HDI, flexible and rigid-flex circuits, high frequency high speed materials and heavy copper, combined with line widths around 0.075 mm, differential impedance control within plus or minus five percent in applicable high speed scenarios and upfront design for manufacturability review, describes a capability base rather than a single machine.

Programs addressing AI hardware PCBA requirements also need that base to connect to assembly. Delivering fabrication, SMT and final assembly through one chain, with incoming material inspection, solder paste inspection, automated optical inspection and three dimensional X-ray closing the quality loop, reduces the process coordination risk that appears when a dense product moves from design into manufacturing. Under a documented quality management system, a difference detected at functional test can be traced to the material lot or process step responsible.

Optical Modules as a Parallel Driver

The optical communication side deserves separate emphasis because it is driving fine line capability independently of AI packaging.

As module speeds move from 400G and 800G to 1.6T and 3.2T, the electrical interface between the module and the host board carries more channels at higher rates within the same or smaller footprint. That forces tighter impedance control, lower loss materials and finer line geometry on the module board and the host board alike.

Optical module boards also demand dimensional precision for optical alignment features, which shifts requirements toward registration accuracy and material stability rather than raw routing density alone. Manufacturers serving this segment need to hold both electrical and mechanical tolerances simultaneously, and they need inspection capable of verifying features that cannot be measured by electrical test. Supporting telecommunications PCBA programs in this segment means being able to demonstrate process capability on the optical interface, not only on the electrical routing.

The Yield Economics of Substrate-Like Boards

There is a practical reason why the substrate-like transition moves more slowly than the technology roadmap suggests: the economics change sharply as precision increases.

On a conventional multilayer board, a certain proportion of panels can be reworked or downgraded, and the cost of a scrapped panel is bounded by relatively inexpensive materials and a short process sequence. On a fine line substrate-like board, the material cost per panel is far higher, the process sequence is much longer, and rework is largely impossible because the defects that matter are internal. A registration error or plating void discovered at final test represents the accumulated cost of every preceding step.

That shifts the value of process control upstream. Catching a registration drift after lamination is expensive. Catching it after inner layer imaging, when the panel can still be reworked or the cause corrected before more panels are processed, is far cheaper. The same applies to plating uniformity and microvia quality. Manufacturers who invest in in-process measurement rather than relying exclusively on final inspection convert yield improvement into margin, because they avoid accumulating cost on panels that are already unrecoverable.

This is also why equipment alone does not determine competitive position. Two manufacturers can own equivalent exposure tools and achieve very different yields, because the difference lies in how material behavior, lamination parameters, plating control and metrology are integrated. For programs sourcing substrate-like or high density boards, asking how yield is monitored during the process, rather than only what the final test results show, is a more informative question.

What the Equipment Signal Actually Predicts

The core signal released by rising mSAP and advanced packaging equipment orders is that the manufacturing upgrade driven by AI computing has begun to propagate layer by layer, from chips and packaging to equipment, substrates and system PCBs.

As two micrometer exposure, panel-level packaging and mSAP enter industrial production, the PCB industry will not simply be facing capacity expansion. It will be facing a simultaneous transition in manufacturing precision, material systems and process control capability. Those three transitions have to be managed together, because improving one without the others produces a process that performs well on a demonstration board and poorly at volume.

For PCB manufacturing organizations, the implication is that investment decisions should be evaluated against the full chain rather than against a single capability milestone. A new exposure tool raises the achievable line width, but it only converts into business when registration, plating and assembly control support the same precision level. Manufacturers that align those investments with a clear view of which point on the technology gradient they intend to serve will build capability that holds up in production, and that is the capability advanced packaging and high speed system programs actually purchase.