Thermal Via Arrays: Moving Heat Through the Board

A thermal via array is the simplest thermal management tool available on a printed circuit board: a group of small vias under a component that carries heat from the pad into the copper layers below. It costs almost nothing in material and it can lower the thermal resistance of a package by an order of magnitude, which is why it appears under nearly every power device in a surface mount design.

What the Array Does

Heat leaves a surface mount device through its leads and, for a package with an exposed thermal pad, through the pad into the board. The pad itself is a thin copper layer, and copper spreads heat laterally but has nowhere to send it unless there is more copper below.

The via array provides that path. Each via connects the thermal pad to the internal ground planes, to the power planes and to the copper on the opposite side of the board. Because the via barrel is copper and the plane is copper, the heat is transferred by conduction into a much larger volume of metal, and from there into the air, the enclosure, or a heatsink mounted on the other side.

The array also spreads heat laterally. A single via is a poor conductor in the vertical direction compared with the plane it lands on, and the real benefit comes from the plane carrying the heat away sideways to a larger area. That is why a via array over a solid internal plane performs far better than the same array over a region with no copper underneath.

Thermal Resistance of a Via

The numbers are useful because they show how the array scales. A single via of 0.3 mm finished diameter with 25 micrometres of plating, through a 1.6 mm board of ordinary FR-4, has a thermal resistance of roughly 100 kelvin per watt. That is a high figure: one watt through one via would raise the pad 100 degrees above the plane at the far end.

Vias in parallel divide that resistance. Nine such vias give about 11 kelvin per watt, sixteen give about 6, and the contribution becomes small compared with the thermal resistance of the package and of the path from the plane to the ambient air. This is why arrays are built in groups of nine, sixteen or twenty five rather than one or two.

Two factors change the calculation. A thicker plating or a larger hole lowers the resistance per via, and since plating thickness is often fixed by the process, the practical lever is the hole diameter. A shorter board lowers it as well, because the resistance is proportional to the length of the barrel. And the landing plane matters more than the array itself, because a via that lands on a narrow trace rather than a plane has that trace as its only route out.

Sizing and Placing the Array

The array is designed around the thermal pad of the component, and the constraint is that the vias have to fit inside it without breaking the solder joint.

• Via diameter: 0.2 mm to 0.3 mm is typical. Smaller vias fit more in the pad; larger ones carry more heat each.
• Count: as many as fit on a sensible pitch, commonly nine to twenty five. The benefit per via falls as the array grows and the pad temperature becomes uniform.
• Pitch: around 1 mm is a common working value, which leaves enough copper between vias for the plating and for the plane to conduct laterally.
• Placement: keep the array inside the pad boundary, with a small margin so the paste does not bridge to a via wall in the mask opening.
• Landing: every via should land on a plane, not on a signal layer with a clearance ring around it. A via that passes through a plane with a thermal relief is not a thermal via.
• Symmetry: distribute the vias evenly rather than clustering them, because a cluster produces a hot spot next to a cold region.

The distribution matters more than the count once the array is large. A pad with sixteen vias concentrated in the middle and none at the corners will be hotter at the corners than a pad with the same count spread evenly, because heat has to travel laterally through the pad to reach a via.

The Assembly Problem

A via inside a solder pad creates a conflict between the thermal design and the assembly process, and it has to be resolved deliberately.

During reflow, the paste over an open via wicks into the barrel. The consequences are a reduced solder volume on the joint, voids inside the joint, and, where the via is not tented on the other side, solder appearing on the opposite face of the board. On a large thermal pad the effect can be severe enough to leave the pad starved of solder, which increases the thermal resistance of the very joint the array was meant to cool.

Three approaches are used. The via can be tented from the opposite side with solder mask, which limits the wicking but does not eliminate it on a large via. The via can be filled with a resin and plated over, which is the standard solution on demanding assemblies and is usually specified as part of a via in pad process. Or the paste can be printed in a pattern that avoids the via sites, using a stencil whose apertures are arranged in a grid of smaller openings between the vias.

Where the design uses a filled and plated via, the paste volume is predictable and the joint forms normally. That is the arrangement to specify when the thermal pad is large or the component is expensive, and it is the point at which the array stops being a free feature. Our articles on via in pad plating and on solder paste volume cover the process side in more detail.

Where the Heat Actually Goes

An array that lands on a plane has moved the heat into the board, which is only half the problem. The heat still has to leave the assembly.

The first exit is lateral spreading through the planes to the rest of the board, and from there to the ambient air through the board surface. This is where a large ground plane earns its place: it acts as a heat spreader that turns a concentrated source into a distributed one, and it is far more effective than the copper area directly under the device.

The second exit is the opposite face of the board. If the vias connect to copper on the far side, that copper becomes a surface from which heat can escape, and it can be increased in area for the purpose. Where a metal chassis or a heatsink is mounted against that face, the path becomes short and effective, which is the usual arrangement for a board mounted to an aluminium housing.

The third exit is the component itself, through its own package and its top surface. On a large device, a heatsink attached to the top of the package may carry more heat than the board can, and the via array then complements rather than replaces it.

Two rules follow from this. The plane the vias land on should be as large and continuous as the design allows, with no slots or islands beneath the component. And the path from the plane to the ambient should be checked, because a board with an excellent array but no route for the heat to escape will still run hot. Our overview of thermal management sets out how those paths are compared.

When the Array Is Not Enough

An array works when the heat density is moderate and the ambient is manageable. It reaches its limit when the heat flux is high, the surrounding air is hot, or the assembly has no room for a heatsink.

At that point the options are a metal core or copper base construction, where the dielectric and the plate carry heat directly rather than through the laminate, or a copper coin pressed into the board directly under the device. Both are covered in our guide to metal core boards, and both trade cost and manufacturability for thermal performance.

The intermediate option is a thicker copper weight on the layer the vias land on, which lowers the lateral spreading resistance without changing the board construction. A 2 oz plane spreads heat measurably better than a 1 oz plane of the same area, and where the thermal calculation is marginal, that is often the cheapest change available.

Confirming the Design

Thermal designs are usually checked by measurement rather than by simulation alone, and the measurement is easier than it sounds.

The first approach is a thermal test board. The device is powered with a known current, a thermocouple or an infrared camera records the case temperature, and the junction temperature is calculated from the thermal resistance quoted in the datasheet. Comparing a board with an array against the same board without one gives the contribution of the vias directly.

The second is infrared imaging of the operating assembly, which shows where the heat actually goes rather than where it was assumed to go. It commonly reveals that the plane is being interrupted somewhere the designer did not expect, such as by a connector keepout or a via field, and that is the finding worth acting on.

A simulation is useful for comparing stackup options before the board exists, but the boundary conditions dominate the result, so the model should be calibrated against a measurement of a similar assembly rather than used as an absolute prediction.

FAQ

• How many thermal vias should I use? As many as fit sensibly inside the pad, commonly nine to twenty five. Beyond that the benefit per via falls and the assembly risk rises.
• Do thermal vias need to be plated over? Only where the paste wicking would starve the joint or where solder on the far face is unacceptable. On a small pad, tenting from the other side is often enough.
• Does a thermal relief belong on a thermal via? No. A relief is a deliberate thermal break, and it would defeat the purpose.
• Can vias be placed outside the pad? They help the plane but not the joint, because heat has to travel laterally through the copper to reach them.
• What copper weight is best under a power device? The heaviest the design can afford. A 2 oz plane spreads heat noticeably better than 1 oz of the same area.

Summary

A thermal via array is the standard way to move heat out of a surface mount power device and into the copper layers. Each via has a thermal resistance in the region of a hundred kelvin per watt on a typical board, so the array works by parallel connection and by landing on a plane that can spread the heat sideways.

The design is constrained by the pad, by the landing plane and by the assembly process. Vias belong inside the pad, on a sensible pitch, landing on continuous copper, and the paste wicking they cause has to be managed by tenting, by paste pattern or by a filled and plated via in pad. Beyond that the array only helps if the heat has somewhere to go, which makes the plane, the opposite face copper and the capability of the process part of the same thermal design rather than separate considerations.