32.768 kHz Crystal Layout: Load Capacitance and RTC Accuracy

A real-time clock keeps time while the rest of the product is powered down, and it does so with a crystal that operates continuously from a small backup supply. That crystal runs at a low frequency and draws very little current, which makes it sensitive to everything around it: the capacitance of its load network, stray capacitance from nearby copper, leakage across a contaminated board surface, and thermal gradients. A 32.768 kHz crystal layout is therefore a precision analog layout problem rather than a digital one.

The frequency is not arbitrary. A 32.768 kHz crystal divides by powers of two to produce a one-second time base, because 32768 is two to the fifteenth power. That relationship is what allows a simple binary divider chain to generate seconds exactly, and it is why the frequency is standard across the industry.

What the Real-Time Clock Does

The real-time clock serves two functions. It maintains the correct time while the product is off, drawing power from a backup cell so that the count is not lost, and in some designs it also serves as the low-power clock for the main logic during standby, allowing the higher-frequency system clock to be stopped or gated. When a product loses time after the battery is removed, the cause is usually the absence of a backup cell or a cell that has reached the end of its life, rather than a layout problem.

Because the clock runs continuously, its accuracy accumulates. An error of a few seconds per month is acceptable in many products and unacceptable in others, and the difference between those outcomes is usually the crystal specification, the load capacitance, and the layout rather than the oscillator circuit itself.

The crystal itself is specified by its size, its nominal load capacitance, its frequency tolerance at room temperature, and its stability over temperature. Those parameters are fixed at purchase. The layout determines whether the circuit achieves the specified accuracy or degrades it.

Load Capacitance and Stray Capacitance

A crystal is specified to oscillate at its nominal frequency when it sees a particular load capacitance, commonly 6 pF, 9 pF, or 12.5 pF. The two capacitors connected from each crystal terminal to ground, together with the stray capacitance of the board, form that load. If the total load is higher than specified, the oscillator runs slow; if it is lower, it runs fast.

Stray capacitance is the part that layout controls. It comes from the pads, the traces connecting the crystal to the oscillator pins, the capacitance of the oscillator input itself, and any copper that passes nearby. It is not a fixed value, which is why the load capacitors should be selected after the layout is drawn and the stray contribution estimated, rather than chosen at the schematic stage and left unverified.

Two practical rules follow. Keep the traces between the crystal and the oscillator pins as short as possible, since trace length adds capacitance, and keep other conductors away from those traces, because a conductor that runs alongside them adds capacitance and also couples noise.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/copper-clad-plate-cutting.jpg" alt="Guard ring and ground structure around a real time clock oscillator” />

The value of the load capacitors is also influenced by the tolerance of the capacitors themselves and by their temperature behaviour. Where accuracy matters, capacitors with a low temperature coefficient should be used, because a capacitor that changes value with temperature shifts the oscillation frequency.

Placement of the Crystal

The crystal and its load capacitors belong immediately adjacent to the oscillator pins of the device, on the same side of the board, with the return of the load capacitors connected to the same ground reference. Placing the crystal on the opposite side of the board forces the connections through vias, which adds inductance and capacitance and lengthens the sensitive loop.

The area around the oscillator should be kept free of other circuitry. Switch-mode supplies, clock lines for other interfaces, and high-current traces are all sources of interference that the low-level oscillator signal cannot tolerate, and the coupling mechanisms are worse when the aggressor runs parallel to the crystal connections. Where the design permits, an unbroken ground area should surround the oscillator circuit on the same layer, and no signal trace should pass under the crystal or between the crystal and the device.

Guard Ring and Ground Structure

A guard ring of grounded copper surrounding the oscillator circuit provides both shielding and a defined return path. The ring should be connected to the ground reference with multiple vias rather than at a single point, so that its impedance at the frequencies of interest is low, and it should not form a closed loop that itself couples to other circuits.

The ground under the crystal should be solid and connected to the system ground plane with several vias. This provides the reference for the load capacitors, shields the circuit from fields below it, and improves the thermal path. Where the crystal has a metal case, the case should be connected to this ground, which turns the package into part of the shield rather than leaving it as a floating conductor that couples noise.

Routing Rules Around the Oscillator

Three rules cover most of the layout. Keep the connections short, keep them on one layer, and keep everything else away from them. Traces to the load capacitors should be as wide as the pad geometry allows, not for current capacity but to reduce the inductance of the connection, and they should never be routed alongside a switching node.

Where the crystal is driven at a very low level, the connections are also sensitive to leakage. A board surface contaminated with flux residue or moisture can provide a leakage path between the two crystal terminals, which shifts the frequency or stops oscillation entirely. This is one of the few places where board cleanliness has a direct electrical effect, and a no-clean process that leaves residue in this area should be evaluated with care.

Thermal and Mechanical Considerations

Crystal frequency varies with temperature, and the variation is characterised by the manufacturer as a stability figure over a temperature range. Two layout choices affect the temperature the crystal actually sees. The first is distance from heat-generating components, which should be as large as the layout allows. The second is airflow, since a crystal placed in a stagnant region will run hotter than one in a ventilated area.

Mechanical stress matters for the same reason. A crystal mounted near a board edge, a mounting screw, or a connector experiences bending forces that can shift its frequency or damage the package, so it should be placed in a mechanically quiet area away from the points where the board is constrained. The same reasoning applies to the pad geometry, which should follow the manufacturer’s recommendation rather than a generic land pattern, as described in PCB pad design standards.

Verification

The oscillator should be measured rather than assumed to work. Frequency can be checked by measuring the output of the divider or by monitoring the clock through a test point, and the measurement should be made at the temperature extremes the product will see, not only at room temperature. Where the design includes a calibration mechanism, the measurement establishes the trimming value.

Leakage and contamination problems are found by cleaning the board and repeating the measurement. If the frequency shifts after cleaning, the original result was influenced by residue, and the cleaning process is part of the design rather than an optional step. Related practices for handling sensitive circuits during assembly are described in conformal coating and board protection.

The general coupling mechanisms that make the oscillator vulnerable are described in the 3W crosstalk rule.

FAQ

Why does the clock run slow or fast? Most commonly because the total load capacitance does not match the value the crystal was specified for. Stray capacitance from the layout adds to the load capacitors, so a board with long connections or nearby copper presents a larger load than intended and the oscillator runs slow.

Do I need the load capacitors if the oscillator datasheet shows an internal capacitance? Yes, if the device requires external load capacitors, because the internal value is only part of the total. The external capacitors are sized so that the external capacitance plus the internal and stray capacitance equals the specified load.

Is it acceptable to route a signal under the crystal? No. A trace passing beneath the crystal or between it and the oscillator pins changes the stray capacitance, breaks the continuity of the ground reference, and couples noise into the most sensitive node in the circuit. The area should be kept clear.