12 PCB Layout Tips for Spacing, Decoupling and Teardrops

Most layout problems that reach the assembly line were decided long before the file was released, and a handful of them account for the majority of rework. The PCB layout tips below cover the spacing, placement and pad decisions that affect solder paste printing, reflow yield and mechanical reliability. None of them are exotic, but each one is easy to overlook when a board is dense and the schedule is short, and each one has a measurable consequence downstream.

Component spacing on the placement grid

Components placed too close together make paste printing and reflow difficult, and the risk is bridging rather than a cosmetic issue. A practical starting point for component spacing is 0.3 mm or more between identical packages. When the neighbouring parts differ in height, a clearance of 0.13 times the height difference plus 0.3 mm gives the nozzle and the reflow shadow enough room; the height term matters most next to a tall connector or an electrolytic capacitor. Parts that will only ever be soldered by hand need at least 1.5 mm between them so an iron can reach the pad without touching a neighbour. Treat these as defaults and let the internal process specification override them.

Separating through-hole and SMT parts

Where a through-hole resistor sits beside a surface-mount part, leave roughly 1 mm to 3 mm of clearance. The wave or selective soldering step that follows reflow can deposit solder and flux beyond the intended pad, and a close neighbour will shadow the joint or collect a bridge. Through-hole parts are much less common than they once were, but mixed-technology boards still appear, and the spacing rule is one of the first things to check when such a board is reviewed.

Decoupling capacitor placement

Every power pin on an integrated circuit needs a decoupling capacitor, and every capacitor needs to be as close to its pin as the routing allows. When a device has several supply pins, each pin gets its own capacitor rather than sharing one across the package. The loop from the capacitor, through the via, into the plane and back to the pin is the loop that decides how well high-frequency noise is shunted, so trace and via length in that loop matter more than the nominal capacitance value. Physical distance is the variable the layout engineer actually controls, which is why decoupling capacitor placement is treated as a placement task rather than a schematic one.

Board-edge orientation and keepout

Boards are usually assembled in a panel and separated afterwards, so components near the edge must satisfy two conditions. First, align the package parallel to the cut direction so the mechanical stress is distributed evenly; a part sitting across the cut line can lose a pad when the panel is depanelised. Second, keep a defined keepout band along every edge free of components so the router or the V-score does not damage them. The keepout width depends on the depanelisation method, so fix the method during layout rather than after the panel is designed.

Connecting adjacent pads

When two neighbouring pads must be connected, route the connection on the outside of the pair and give the trace enough width for the current it carries. A short trace run between two pads can be pulled into a bridge during reflow, and the resist wall between the pads is not a reliable barrier. Checking the copper width also prevents a fine trace from becoming the current limit for a power net that feeds both pads.

<img src="https://www.gopcba.com/wp-content/uploads/2021/02/work2_overlay.png" alt="Teardrop transition where a trace meets a copper pad” />

Pads inside a copper pour and thermal relief

A pad that lands inside a copper pour needs a deliberate connection pattern. A direct connection to a large plane pad makes hand soldering and rework very difficult, because the copper conducts heat away faster than a small iron can supply it. Spokes or thermal reliefs limit that loss and keep the joint workable. The number of spokes should follow the current: a signal pad can use one, while a power pad needs enough copper to carry its rated current without excessive temperature rise. Designing the relief together with the pad design standards keeps the electrical and assembly requirements aligned.

Teardrops and trace-width transitions

When a trace is narrower than the pad it enters, add a teardrop at the junction. The teardrop grades the transition, which avoids the impedance step that a sudden narrowing produces and relieves the mechanical stress concentration where the trace meets the pad. Boards that are routinely depanelised, flexed or handled roughly benefit most, since the failure mode it prevents is a lifted or cracked trace right at the pad edge. It costs nothing in fabrication and slightly improves the appearance of the finished artwork. Pair the teardrop with an equal trace width on both sides of the pad, because an asymmetric entry shifts the stress to one side and defeats the purpose.

Unused pins, via in pad and edge clearance

Unused device pins still exist on the package, so keep their pads and connect them to ground rather than leaving them floating. A floating pad can couple noise into the device or radiate from the stub, while a grounded pad shields the pin. Avoid placing a via in pad unless the process is set up for it, because an open via wicks solder away from the joint and produces a starved or voided connection; where the density forces it, the via must be filled and plated over. Finally, keep traces and components back from the board edge, especially on thin single-sided and paper-based laminates that crack when the panel is stressed. The board outline and mounting design review is the right place to confirm the edge allowance.

None of these rules survive a design review by memory alone, so add them to the checklist as explicit items. The placement order and pad positioning step is where they are cheapest to apply, and gopcb flags the ones that directly affect fabrication yield when a package is reviewed.

Rework access and test points

Yield is decided as much by how easily a board can be reworked as by how well it solders the first time. Leave enough clearance around fine-pitch devices for a hot-air nozzle or a soldering tip, and avoid burying a small part behind a tall component where it cannot be reached. Place test points on a regular grid, keep them free of solder mask and give each one a reference designator that matches the netlist so the fixture and the technician are working from the same map. Route critical test points away from switching nodes and high-impedance inputs, since a probe adds capacitance and a long stub adds inductance. A board that cannot be probed or reworked will be scrapped when a single joint fails, which is a far higher cost than the extra few square millimetres of layout area.

FAQ

How close can two SMT parts be placed? Start from 0.3 mm for identical packages and add 0.13 times the height difference when the neighbours are not the same. Hand-soldered parts need at least 1.5 mm. Confirm the final value against the assembly house process specification.

Is placing a via in a pad ever acceptable? It is acceptable in dense designs when the via is filled and plated over so the pad remains flat. Without filling, the via wicks solder out of the joint and leaves a weak or voided connection that may pass visual inspection.

Why do teardrops matter on a rigid board? They reduce the mechanical stress concentration where a narrow trace meets a wide pad and smooth the impedance transition at the same point. Both effects raise the board survival rate through depaneling, handling and thermal cycling.