PCB Layout Anti-Interference Design: Rules for Noisy Systems

Interference problems are almost never solved by adding components. They are solved by removing the loops and discontinuities that allow noise currents to travel through the board. Anti-interference design starts with ground, continues with power distribution, and finishes with the placement of the parts that inject or receive noise.

The rules below are old and unglamorous, which is exactly why they still work. Each one removes a specific coupling path rather than treating symptoms.

Ground Routing Comes First

Separate digital ground from analog ground, then join them at one point, usually at the analog-to-digital converter or the power entry. Multiple uncontrolled joins turn the two grounds into one noisy conductor with unpredictable current paths.

Make ground traces wide. A common working rule is to size the ground conductor for at least three times the current the board is expected to carry, which in practice means two to three millimeters of width on a typical signal layer. Narrow ground traces are the most common cause of level shifts between two parts of the same circuit.

Where possible, arrange the ground as a closed loop rather than a branched tree. A loop distributes return current more evenly and reduces the potential difference between distant points on the board, which is what a noisy digital return path otherwise creates.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/flexible-pcb-assembly-cover.jpg.webp" alt="PCB layout with ground plane and decoupling capacitors” />

Power Distribution and Decoupling

Size power traces from the current they carry and give the supply entry its own decoupling: a bulk capacitor of ten to one hundred microfarads at the connector. That capacitor absorbs the inductance of the incoming cable and stops supply noise from entering the board through the power pins.

Route power and ground in the same direction as the signal flow they serve. This keeps the return path under the signal, which minimizes the loop area of each signal and its return, and loop area is what couples noise from one trace into another.

Every decoupling capacitor does two jobs: it supplies charge to the device locally and it shunts high-frequency noise away from the power pins. Its effectiveness depends almost entirely on the loop between the capacitor and the pin it serves.

Decoupling Capacitor Placement

Place the capacitor as close as possible to the power pin, with the shortest possible connection to both the supply pin and the ground reference. A high-frequency bypass capacitor with long leads or a long via path has already lost most of its useful bandwidth before it is soldered.

One 0.01 to 0.1 microfarad ceramic capacitor per integrated circuit is the standard practice. Where space does not allow, one 1 to 10 microfarad capacitor can serve a group of four to ten devices. Devices with weak noise immunity or large switching currents, including memory and processors, need their own capacitor regardless of grouping.

Self-resonance limits what any capacitor can do. A 0.1 microfarad capacitor with about 5 nanohenries of mounting inductance resonates near 7 MHz, so it decouples well below that frequency and poorly above 40 MHz. Larger capacitors resonate higher and cover the upper band, which is why a mix of values is more effective than a single large one.

Clock, Crystal and Sensitive Devices

Keep the crystal oscillator, the clock generator and the clock input of the processor close together and away from low-frequency circuitry. The oscillator loop carries a small current at a precise frequency and is sensitive to both injected noise and stray capacitance.

Keep high-current circuits away from logic, and place devices that dissipate significant heat above them in the enclosure rather than below. Heat moves upward, and an electrolytic capacitor in the plume of a power resistor loses life quickly.

Ground the crystal load capacitors to the same local ground as the oscillator, and keep the loop between them small. A split or long return path for a crystal circuit produces jitter that shows up later as intermittent communication failures.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/high_density_pcb.jpg" alt="Shielded cable terminated on a board with filter components” />

Separating Noisy Conductors

Keep power lines, AC lines and signal lines apart. If they must share a board, route them in different regions rather than parallel over any distance, and cross them at right angles where crossing is unavoidable. Traces on opposite sides of the board should run perpendicular for the same reason.

Address lines should be similar in length and as short as practical. Bus lines benefit from a pull-up resistor in the ten kilo-ohm range, which holds undefined states at a known level instead of letting them float and follow nearby noise.

Unused logic inputs must never float. Tie them to the supply through a pull-up resistor or connect them to an input that is in use, so they cannot be driven by coupling from adjacent traces.

Board Position and Mechanical Details

Where the board sits inside the enclosure changes its noise behavior. Keep switching regulators and other high-current sources away from the enclosure openings that carry cables, since a cable routed past a noisy region picks up the field and carries it out of the box.

Mounting hardware and metal standoffs also matter. A standoff that touches a ground plane in several places creates parallel return paths and can form a loop with the chassis. Define which mounting holes are grounded and which are isolated, and record that decision on the mechanical drawing.

Cables and Shielding

Signals that leave the board should travel on shielded cable. Digital and high-frequency cables are grounded at both ends, while low-level analog cables are usually grounded at one end to avoid a ground loop through the shield.

For circuits that are especially sensitive or that radiate strongly, a metal enclosure or a local shield can be added. Ferrite materials are less effective against noise above roughly 500 kHz, where thin copper shielding works better.

Where a shield is screwed to the chassis, watch the joint between dissimilar metals. Galvanic corrosion at that contact adds resistance over time, and a shield that no longer makes good contact converts a screened circuit back into an antenna.

Verifying the Design in Practice

Anti-interference rules produce a board with small loops, continuous returns and controlled coupling paths. The practical test is a spectrum measurement near the board and a functional check under load, including the transient conditions that generate the largest currents.

When a problem appears, find the loop rather than adding a component. Most radiated and conducted problems trace back to a return path that was interrupted, a decoupling capacitor placed too far from its pin, or a sensitive trace routed under a switching node.

Further reading: ground current and harmonic distortion, EMI suppression design principles, and mixed-signal PCB design guidelines.

FAQ

Should analog and digital grounds be completely separate planes? They should be separate regions joined at one point, typically under the data converter. Two isolated planes with no single join create a floating reference and worse performance than a shared plane with controlled returns.

How many decoupling capacitors does one board need? Start with one per integrated circuit plus a bulk capacitor at the supply entry, then remove capacitors only where the layout shows the pin is already adjacent to a plane and another capacitor. Removing them by default is a false economy.

What is the fastest way to find an interference problem? Narrow the source by disabling functional blocks one at a time and watching the measured spectrum. Then check the return path under the affected trace before changing any component value.