PCB Design Mistakes That Stop a Prototype at CAM

When a prototype comes back late, the cause is usually not the fabricator. It is the data. A layout that passes every check inside the CAD tool can still stop at CAM, because the checks in the tool model the schematic and the design intent, not the physical process. The incidents below are the ones that recur most often across prototype orders, and each of them costs a day or more when it is found after the file is released.

Pad Stacks and Drill Files

Stacked pads are the first trap. Except for surface-mount pads, a pad implies a hole, so overlapping pads mean overlapping holes. The drill program will attempt to enter the same location more than once, which breaks bits and damages the hole wall on the panel. If the layout needs two features in the same place, they have to be resolved in the design rather than left for the drill to sort out.

Multilayer boards add a second version of the same problem. When two holes overlap and one is defined as a thermal relief while the other is fully connected, the plotted film shows only the isolated pad, and the connection is lost. The board becomes scrap. Single-sided pads need attention as well: they are normally not drilled, but if one must be drilled, the hole diameter has to be marked explicitly or set to zero, otherwise the drill file carries a coordinate the process was never designed to handle.

Using a filled block to draw a pad is another shortcut that passes design rule checks and fails in production. Solder mask data cannot be generated from a fill the way it is generated from a pad, so the block stays covered by mask after lamination and the component cannot be soldered. Pad geometry generally deserves the same discipline as component placement, and the conventions are summarized in PCB pad design standards.

<img src="https://www.gopcba.com/wp-content/uploads/2026/08/Prototype-PCB.jpg" alt="Pad stack and drill file review before releasing a prototype for fabrication” />

Layer Usage and Documentation

Drawing practice accounts for a large share of CAM queries. Lines drawn on a mechanical or board layer that carry no function can suggest a five or six layer design when the board is actually four layers, which changes the quote. Worse, when all connections and their labels are drawn on one generic layer, the photoplot step may include the labels while missing the connections, producing either an open circuit or an unintended short. Keep each layer unambiguous and keep the component side on the top layer as the convention expects.

Board outline and copper edge clearance cause real defects. Copper placed closer than about 0.2 mm to the outline can lift during routing, and lifted copper takes the solder mask with it. Large copper areas woven as a mesh with gaps narrower than about 0.3 mm produce film slivers during imaging, and those slivers land on the panel as stray copper that creates shorts. Uneven copper distribution has a milder but still visible effect, since it causes the plating thickness to vary across the panel.

Silkscreen Legend and Test Access

Legend over pads is a classic. Text printed across a surface-mount land makes the board harder to inspect and the part harder to solder, and on fine-pitch parts it may be the only source of solder bridging. Text size matters in both directions: too small and the screen print smears, too large and adjacent labels merge into an unreadable block.

Test access is the requirement most often forgotten. On a dense surface-mount assembly the pads are narrow and the gaps between them are small, so a bed-of-nails fixture has to offset its probes vertically or horizontally to reach them. If the pads are drawn too short for the probe to land off the component body, the fixture cannot be built without touching the part. Short pads cost nothing to extend at design time and a full fixture redesign later.

Shape and Tooling Details

Slots and non-round holes have their own rules. An elongated slot needs a length-to-width ratio of at least 2:1 and a width greater than about 1.0 mm, because a narrower slot breaks drills and drives cost up sharply. Several outline lines that do not coincide leave the fabricator to guess which one governs, and the guess is not always the one the designer intended. Layer order needs the same clarity: a four-layer board routed through a different stack sequence than the one assumed will change the impedance and the reference planes.

Plane Layers and Thermal Reliefs

A plane drawn with thermal reliefs behaves differently from a plane drawn solid, and the plotted film is the opposite of what the drawing appears to show. Every line in a relief pattern is an isolation gap on the finished board. A break where a break was not intended becomes a short between two different supplies, and a region that ends up closed on itself becomes one supply cut into two islands. Reviewing a plane layer therefore means reading the negative: trace each island, confirm it belongs to exactly one net, and confirm that no gap interrupts a connection that has to exist. Do this review last, when the rest of the layout is stable, because a change elsewhere can silently reshape the plane.

Silkscreen legend clearance around surface mount pads

Fills and Data Volume

Fills are plotted line by line rather than as a closed region, so a layer built from many small blocks, or from very fine fill lines, produces an enormous photoplot file. Large data volumes slow the CAM step and, more seriously, raise the chance that the plot is truncated and that geometry disappears without an error message. Prefer a few large, simply shaped pours over dozens of small ones, and let the plane layers do the work they were designed for instead of reproducing them with fills.

Checking the Data Before Release

A short review before release catches nearly all of these PCB design mistakes. Inspect the drill file for coincident coordinates. Check that every pad has an associated mask opening. Confirm the legend does not overlap any land. Confirm the outline is a single closed profile with no duplicate lines. Measure copper-to-edge and mesh gap dimensions against the fabrication limits. Then, if the design is a first attempt at a new stackup, walk the constraints through the fabricator rather than assuming that a rule from another project still applies; the general checklist is in manufacturable design guidelines, and via-related issues are covered in via design rules.

FAQ

Why do stacked pads cause drill breakage? Because two overlapping pads become two overlapping hole coordinates. The drill re-enters the same location on a panel where the material has already been removed, which snaps the bit.

Is a filled block ever acceptable as a pad? No. It passes a design rule check but the mask layer cannot be derived from it, so the area stays covered and cannot be soldered.

How much copper-to-edge clearance should I keep? At least about 0.2 mm. Below that the copper is at risk of lifting during outline routing, and the solder mask above it tends to flake off with it.

What is the minimum slot width the shop can drill? Roughly 1.0 mm with a length-to-width ratio of at least 2:1. Narrower or shorter slots break tooling and add cost.

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