Impedance Control Factors in High Speed PCB Design

Impedance control is often described as a single number on a drawing, but the number is the result of several independent variables that all vary in production. Trace width is etched, dielectric thickness is pressed, dielectric constant depends on the resin and glass content, and copper thickness changes with plating. Each has its own tolerance, and the impedance of the finished trace is the sum of their effects rather than the product of a calculation done once at the start of the project.

The Four Variables

Trace width is the variable the designer controls most directly, and it is also the one most affected by the etching process. A trace drawn at a nominal width comes out narrower at the top than at the base because the etchant attacks sideways under the resist, so the width that matters electrically is an average that depends on the copper thickness and the process.

Dielectric thickness is set by the lamination, and it depends on the prepreg combination and on the copper balance across the panel. Resin flows away from heavy copper areas during pressing, so a layer with uneven copper distribution ends up with uneven dielectric thickness, and the impedance varies across the board even when the artwork is uniform.

Dielectric Constant and Its Variation

The dielectric constant of a laminate is quoted as a nominal figure, but the value that matters is the one at the operating frequency and for the specific resin content and glass style used in that layer. A woven glass fabric has resin rich and glass rich regions, and a narrow trace that sits over only one of them sees a different effective dielectric constant from a wide trace spanning several bundles.

That effect is one reason fine traces are harder to control than wide ones. It also explains why the material specification matters: a laminate with a lower and more consistent dielectric constant gives a wider manufacturing window for the same impedance tolerance, which is often worth more than the loss improvement that motivated the material choice in the first place. Our notes on high frequency laminate selection criteria compare the families.

Copper Thickness and Plating Distribution

Copper thickness affects impedance in two ways. It changes the cross section of the conductor, and at high frequency it also changes the effective resistance through the skin effect. Plating adds copper to the surface and to the barrel, and the distribution is not uniform: isolated features plate thicker than dense ones, and the panel edges differ from the centre.

Where a tight impedance tolerance is required, the coupon used to verify it should be built with the same copper density as the product. A coupon with a sparse pattern plates differently and reports a thickness the product never reaches, which is why coupon design is part of the impedance specification rather than an afterthought.

How the Tolerances Add Up

The finished impedance is not the nominal calculation plus a single margin. Each input contributes an error, and the errors combine in a way that depends on the sensitivity of the impedance to each one. Widening the trace by ten percent changes the impedance far more when the trace is narrow than when it is wide, so a tolerance budget should be built from the sensitivities rather than from a fixed percentage applied to everything.

That is why the same tolerance request is easy for one design and difficult for another. A wide trace on a thick dielectric tolerates the process variation comfortably, while a narrow trace on a thin dielectric of the same nominal impedance needs much tighter control of width and thickness to hold the same window. Our notes on PCB manufacturing tolerances give realistic process figures for each input.

Coupon Design and Verification

The coupon is the evidence that the process produced what the design intended. It should contain the same trace geometry as the critical nets on the product, be built on the same panel, and be measured with a method agreed in advance. Time domain reflectometry is the usual production check, because it shows both the impedance and the discontinuities along the structure in a single measurement.

The results should be recorded against the lot number, and the acceptance limit should be derived from the design rather than chosen by convention. Where a channel is marginal, an impedance that sits at the edge of a plus or minus ten percent window may leave less margin than the link budget assumed, and the coupon result is the only way to know. Our notes on impedance discontinuity analysis show how to read the profile.

Specifying Impedance on a Drawing

An impedance requirement should name the net class, the target value, the tolerance, the reference layer and the coupon that verifies it. Without the reference layer the number is ambiguous, because the same trace over a different plane has a different impedance, and without the coupon the fabricator has no defined way to demonstrate compliance.

Where a design uses several stackups or several impedance targets, they should be tabulated on the same drawing rather than scattered through notes. A shop that has to interpret the requirement is a shop that will ask a question, and a question at the quotation stage is far better than a discrepancy found during the first article inspection. Our notes on microstrip and stripline routing explain how the trace structure interacts with the target.

FAQ

Which variable affects impedance most? Dielectric thickness and trace width usually dominate, with dielectric constant and copper thickness following. The sensitivity depends on the geometry, so the budget should be calculated rather than assumed.

Can a fabricator guarantee impedance without a coupon? They can control the process, but the coupon is the evidence. Where impedance is critical, the coupon should be part of the production panel and measured per lot.

Does a tighter tolerance always cost more? Usually, because it requires tighter control of lamination, etching and plating. The cost should be weighed against the margin the design actually needs rather than requested as a precaution.

Building a Tolerance Stack That Reflects the Process

A useful tolerance stack starts from the process figures the fabricator can actually hold, not from ideal values. Width tolerance comes from the etching line, thickness from the lamination and the prepreg combination, dielectric constant from the material batch and the resin content, and copper thickness from the plating distribution. Each should be entered with its own sensitivity, and the result should be a range of impedance rather than a single figure.

Once the range is known, the design decision becomes clear. If the worst case impedance still satisfies the link budget, the tolerance request is adequate and no further cost is justified. If it does not, there are three levers: widen the trace and thicken the dielectric to reduce sensitivity, choose a material with a tighter dielectric constant, or accept a tighter process window and pay for the additional control. Choosing between them on the basis of a calculated stack is a decision that can be defended; choosing on the basis of habit is not.

One practical note: keep the stack current. When the fabricator changes a prepreg supplier, a plating line or an etching chemistry, the numbers that fed the original stack change too, and the impedance window shifts. Reviewing the stack whenever the process changes is cheaper than discovering the shift during an impedance test on a production lot.