PCB Manufacturing Tolerances: What the Numbers Actually Mean

Every number on a fabrication drawing is a tolerance, whether it is written as one or not. Copper thickness varies, traces etch narrower at the top than at the base, layers shift relative to each other during lamination, and holes land slightly away from their nominal position. Design that ignores these variations is design that will be reworked.

Every discussion of PCB manufacturing tolerances therefore begins with the question of what the design can tolerate rather than what the process can achieve on its best day. The purpose of a tolerance stack is not to make fabrication harder. It is to define the space in which the design still works, so that the fabricator knows how much variation is acceptable and the designer knows how much margin exists.

Why Tolerance Exists in Fabrication

Fabrication is a subtractive and additive process running at production speed. Etch chemistry changes as copper is dissolved, lamination presses heat unevenly across a panel, and drill bits wander as they enter the surface. Each of these effects is small, but they accumulate across a panel.

A fabricator holds tolerances that reflect the equipment on the floor, not the best result ever achieved on it. Understanding this is the difference between a design that yields and one that generates concessions on every order.

PCB manufacturing tolerance measurements on a production panel

Trace Width and Etch Factor

Etching removes copper vertically and laterally at the same time, which produces a trapezoidal cross section. The top of the trace is narrower than the base, and the difference depends on copper thickness and etch chemistry. A 1 ounce copper layer etched normally loses a few tenths of a mil per side at the top.

This is why trace width tolerance is quoted as a band rather than a value. A nominal 6 mil trace may arrive between 5 and 7 mil on the base, with the top edge narrower still. On controlled impedance nets, that spread translates directly into an impedance spread, which is why the tolerance on impedance is stated separately.

Designing at the process minimum leaves no margin for the narrow end of the band. Working one increment above the minimum costs nothing in board area and removes a whole class of yield loss.

Inspection of drilled and plated holes against tolerance chart

Layer Registration

Registration is the alignment between layers. Inner layers are imaged, etched and laminated under heat and pressure, and they move relative to each other. Registration tolerance is typically expressed as a radial value, meaning the misalignment may occur in any direction.

Registration drives three design rules: annular ring on vias, clearance between a via and a plane it must not touch, and the overlap between a soldermask opening and its pad. A via with a tight annular ring may break out of the pad after plating and etching, and the resulting void is a reliability risk rather than an instant defect.

The practical control is to size annular rings and mask dams for the worst-case shift rather than the nominal one. Increasing a via pad by two mils usually costs nothing and removes a recurring failure mode.

Hole Position and Drill Tolerance

Hole position tolerance combines drill accuracy, machine registration and material movement. A drill bit deflects as it enters the stack, and the deflection grows with hole depth and with the number of panels drilled by that bit before replacement.

Hole position tolerance matters most in two places: inside a pad, where it determines the remaining annular ring, and in a connector footprint, where a row of pins must fit a mating part. In the second case, tolerance is cumulative along the row, so a tight pitch magnifies the effect.

Where the hole is used as a mechanical feature, such as a mounting hole, its tolerance should be separated from the electrical hole tolerance on the drawing. Confusing the two leads either to unnecessary cost or to assemblies that will not fit.

Board Thickness and Copper Weight

Board thickness tolerance applies to the finished stack and is dominated by the dielectric materials. Prepreg and laminate are pressed to a nominal thickness, and the result varies with resin flow during lamination. A 1.6 mm board may be delivered between 1.5 and 1.7 mm, and thinner boards are proportionally more variable.

Copper weight tolerance affects current capacity and impedance. Plating adds copper to the barrel and to the surface during a standard process, so a nominal 1 ounce outer layer often measures heavier after plating. Inner layers do not see that addition, which is one reason outer and inner trace widths must be calculated separately.

Thickness also interacts with impedance. If the dielectric between a trace and its reference plane is thicker than nominal, impedance rises, and no change to trace width during design can compensate for it after fabrication.

Solder Mask and Silkscreen Tolerances

Solder mask is imaged with the same registration error as copper, and it flows during curing. Mask dams between fine-pitch pads are the most sensitive feature: a nominal 4 mil dam can vanish where registration error and flow combine, leaving exposed copper between pads.

The mask opening is normally made slightly larger than the pad, which keeps the pad solderable but reduces the annular clearance. Where a design pushes both the mask dam and the pad clearance to the limit, a small change in either direction produces a bridge.

Silkscreen is a printing process and has the widest tolerance of any layer. Text that overlaps a pad is not a fabrication defect, but it will be printed on the pad and reduce solderability. Keeping legend off pads is a design responsibility.

Accumulating the Stack

A tolerance stack combines the effects that matter for a specific feature. For a via, it includes drill position, layer registration and pad imaging. For a connector, it includes hole position across the row and board thickness to fit the mating part.

Doing this arithmetic once at the start of a design removes the need to negotiate concessions later. Most concession requests come from a design that was drawn at nominal values with no margin anywhere.

Writing Tolerances on the Drawing

A good fabrication drawing states material, layer count, thickness with tolerance, copper weights, minimum trace and gap, surface finish, impedance requirements with tolerance, and the standards the fabricator should follow. Anything not stated will be built to the fabricator default, which may be looser than the design assumes.

Where a feature is critical, say so explicitly and state the measurement method, because a dimension that cannot be measured on the finished board is not a controllable requirement. Where a feature is not critical, say that too, so that the fabricator can trade it against cost.

Designing With Margin

Margin is cheaper than inspection. Every rule that a design violates must be inspected, documented and sometimes scrapped, while every rule it respects is built without anyone noticing. Working a step above the process minimum, sizing annular rings for the worst case and keeping mask dams generous all reduce cost in the end.

Reserve the aggressive numbers for where they are needed. A controlled impedance pair may justify tight geometry, but the general routing on the same board rarely does, and treating both the same way raises the price of the entire order.

Related reading: trace width and current calculation, dimensional stability and expansion, and board outline and mounting design.

FAQ

Which tolerance causes the most design failures? Layer registration, because it affects annular rings, mask dams and clearances at the same time. Most pinhole opens and residual copper shorts trace back to a design drawn without registration margin.

Does a tighter thickness tolerance cost more? Yes. It requires tighter control of lamination and often the selection of specific prepreg combinations. Where the assembly can accept the standard band, asking for a tighter one only adds cost.

How should impedance tolerance be specified? As a percentage of the target, typically plus or minus ten percent, together with the nets that require it and the stackup that defines the geometry. Without the stackup, the number cannot be reproduced.

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