PWM to Analog Conversion Filter Design

Many microcontrollers have no digital to analog converter, but almost all of them have a timer output. PWM to analog conversion uses that timer and a low pass filter to produce a usable voltage, and while the principle is simple, the filter design decides whether the result is a clean reference or a signal that drifts with temperature and load. The trade is always between response time and ripple.

How PWM Becomes an Analog Voltage

A pulse width modulated square wave spends a controlled fraction of each period at the supply voltage. If the duty cycle is 25 percent, the average value is a quarter of the supply; if it is 75 percent, the average is three quarters. A low pass filter removes the switching component and leaves that average as a DC level, which is the analog output the rest of the circuit sees.

The average is exact only if the high and low levels are stable. Everything in the filter, and everything downstream, sees a voltage that depends on the supply rail, so a PWM derived reference inherits the accuracy of that rail. Where the rail is not precise, the filtered output will not be either, no matter how good the filter is.

The scheme is popular because it costs one pin and two passive components, and because the resolution is set in firmware rather than in silicon. A timer with ten bits of duty resolution gives a thousand steps, which is plenty for a setpoint or a brightness control but marginal for a precision measurement reference.

Choosing the Cutoff Frequency

The filter has to pass the intended signal and reject the switching frequency, so the cutoff frequency is chosen between the two. A common starting point is one hundredth of the PWM frequency, which gives roughly forty decibels of attenuation at the switching rate for a single pole and more for a second order network.

The relationship between settling time and cutoff frequency is fixed. A single pole filter settles to within one percent of a step in about 4.6 time constants, so a 10 hertz cutoff takes roughly half a second to reach a new setpoint. If the application needs to change the output quickly, the cutoff has to move up and the ripple will move up with it.

Using a higher PWM frequency is the cheapest way to relax the conflict, because the filter then has more separation to work with. A timer running at 100 kilohertz allows a 1 kilohertz cutoff with the same attenuation that a 10 kilohertz timer would only reach with a 100 hertz cutoff, and the faster filter responds ten times sooner.

RC filter network on a microcontroller board

Ripple Voltage and Effective Resolution

The residual switching component at the output is the ripple voltage, and its size relative to a single step of the PWM resolution decides whether the extra resolution is real. If one step of a ten bit output is 5 millivolts and the ripple is 50 millivolts, the low bits are buried in noise and the effective resolution is closer to seven bits.

Ripple falls as the filter order rises. A single pole attenuates at 20 decibels per decade, a second order network at 40, and each additional pole adds another 20. Going from one pole to two typically costs one resistor and one capacitor and buys a factor of ten in ripple at the switching frequency, which is usually a better investment than more bits in the timer.

Capacitor quality matters once the ripple is small. A ceramic capacitor with a high dielectric constant loses capacitance with applied voltage and with temperature, so a nominal 1 microfarad part may present 500 nanofarads at the actual operating point. That change moves the cutoff frequency and increases the ripple, which is why a stable dielectric is worth the extra cost in a filter that has to hold its value.

Buffer and Output Impedance

A filtered PWM output has a source impedance equal to the filter resistance, often tens of kilohms. Connecting that directly to an analog input or a load pulls the voltage down and makes the output depend on whatever is connected to it. A unity gain buffer isolates the filter from the load and keeps the voltage defined.

Place the buffer after the filter, and give it a supply that is at least as clean as the output you want. An op amp running from a noisy digital rail will pass a fraction of that noise to the output through its power supply rejection ratio, and at high frequency the rejection falls, so a small series resistor or ferrite in the supply line is a cheap improvement.

The buffer also defines the output range. A rail to rail device can swing close to both supplies, while a general purpose amplifier may only reach within a volt of each rail. If the analog output has to include the extremes of the range, that limitation has to be accounted for in the firmware mapping rather than discovered during testing.

PWM pin feeding an analog filter and buffer circuit

Timer Choice and Resolution Limits

The duty cycle register of the timer sets the resolution, and it is usually limited by the timer clock rather than by the register width. A 16 bit register driven from a prescaled clock may still only produce a few hundred distinct duty values at the chosen frequency, because the number of clock cycles in one period is what actually determines the step size.

There is a second limit that is often overlooked. The output pin has finite rise and fall times, and the high and low levels are not exactly the supply and ground. As the duty cycle approaches the extremes, the pulse becomes so short that the output never reaches its nominal level, and the average stops being proportional to the register value. Compensating in firmware, or restricting the usable duty range, keeps the transfer function monotonic.

Where the timer supports it, a higher clock with a longer period gives both finer steps and a higher switching frequency, which improves every other part of the design. The cost is timer resolution for other functions, so the allocation of timer resources is worth deciding early rather than after the filter values are fixed.

Layout of the Filter Network

The filter components belong close together and close to the buffer input, with short traces between them. A long trace between the resistor and the capacitor adds parasitic capacitance that shifts the cutoff, and a long trace from the capacitor to the amplifier input turns into an antenna for whatever switching noise is nearby.

Keep the PWM trace away from analog inputs, especially where it runs alongside them for any distance. The edges are fast and the coupling is capacitive, so a few millimetres of parallel routing can inject more noise than the filter removes. Where the two must cross, cross them at right angles and keep the analog side over a quiet reference plane.

Our guide to converter layout and routing describes the same discipline for switching supplies, and the reasoning carries over directly. Ground the filter capacitor to the analog ground rather than to a digital return, even if the two are connected somewhere else on the board, and keep that connection single and short.

Verifying the Output on the Bench

Measure the output with the final load connected, not with a high impedance meter alone. A meter draws almost no current and will show the correct average even when the divider formed with the load has already pulled the output down. Comparing the loaded and unloaded readings tells you immediately whether the buffer is doing its job.

Look at the ripple with a scope rather than a meter. The meter shows the average and hides the switching component, while the scope shows the amplitude that the downstream circuit will actually see. A probe with a short ground lead is essential here, because the loop formed by a long ground clip picks up more noise than the ripple being measured.

Finally, sweep the duty cycle across the full range and record the output at each step. Any flattening at the extremes, any step that is larger or smaller than its neighbours, or any hysteresis when the value is approached from above and below points to a specific problem: output saturation, insufficient settling time, or a buffer that is oscillating with a capacitive load. The sweep takes a few minutes and answers questions that would otherwise be guessed at.

Where the board has a spare analog input, connecting the filtered output back to it gives the firmware a way to verify its own reference, which is useful both during development and as a diagnostic in the field. This is one of the low cost techniques described in low cost signal quality improvements, and it costs nothing beyond a trace if the pin is already available.

Choosing Between PWM, an External DAC and a Digital Potentiometer

PWM with a filter is the cheapest option and the easiest to change, but it is slow and it depends on the supply rail. An external digital to analog converter gives better accuracy and no supply dependence, at the cost of a component and a serial bus. A digital potentiometer suits applications where the output is a resistance rather than a voltage, such as setting a feedback divider.

The deciding question is usually accuracy over temperature. If the output has to hold within a few millivolts across the full temperature range, a filtered PWM derived from the same rail that powers the load will drift with that rail and with the capacitor tolerance. A converter with its own reference removes that dependency and is worth the extra cost.

When a converter is used, keep the same layout discipline: a quiet reference, a short output path, and a ground that does not carry switching current. The filter design rules for mixed signal board design apply to both approaches, because the problem is the same one, namely keeping digital switching out of a circuit that has to behave like an analog one.

FAQ

How many bits can a filtered PWM really deliver? Work from the ripple. If the ripple is smaller than a quarter of one step, the effective resolution is close to the nominal value. Below about eight bits of useful accuracy a second filter pole is usually cheaper than a faster timer.

Can I use the PWM output directly without a buffer? For a high impedance input and a slow signal, yes, provided the filter resistance is low enough for the input bias current and any leakage. For anything that draws current, use a buffer.

What if the output has to change quickly and stay quiet? Increase the PWM frequency first, then use a second order filter with a cutoff just above the required bandwidth. If that is still not enough, the requirement really calls for a digital to analog converter rather than PWM.

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