HDMI Interface ESD Protection Layout
An HDMI interface carries several gigabit pairs, a set of control lines and a power pin through a connector that the user plugs and unplugs by hand. That combination of speed and human contact makes it one of the hardest interfaces to protect without degrading, and the layout around the connector determines whether the protection works at all.
What Makes an HDMI Interface Demanding
The data lanes use a transition minimised differential signalling scheme with a data rate that ranges from a few hundred megabits per second for a standard link to several gigabits per second for the newest versions. The signal swing is small and the eye at the receiver is defined tightly, so any added capacitance or impedance discontinuity eats directly into the margin.
The connector also carries the hot plug detect line, a display data channel over a two wire bus, a five volt power pin and a utility line. These slow signals are the paths through which a discharge or a fault most often reaches the board, because they are connected to pins that a user can touch through the plug shell.
The mechanical arrangement is the third difficulty. The plug shell makes contact with the connector shield before the pins mate, which is deliberate: it gives the discharge a path to the chassis before any signal pin is contacted. That only works if the shell is bonded to a low impedance ground close to the connector, which is a layout requirement rather than a component choice.
TMDS Pairs and Impedance Control
Each TMDS pair is routed as a controlled impedance differential pair, usually 100 ohms differential, from the source to the connector. The pair should run over a continuous reference plane with no splits, and the length should be kept as short as the mechanical layout permits, because the loss of the laminate rises with frequency and the eye closes as the loss increases.
Intra pair skew is critical. A mismatch of a fraction of a millimetre converts differential energy into common mode current, which radiates from the cable and reduces the differential amplitude at the receiver. Matching should be maintained through the connector escape and through any protection device footprint, which is often where the matching is lost.
Protection devices must be chosen with their capacitance in mind. A diode with several picofarads of junction capacitance placed on a pair running at three gigabits per second will visibly close the eye. Devices intended for this application offer a fraction of a picofarad, and their footprints are designed so the pair can pass through with minimal discontinuity. The routing rules themselves are the ones described in our guide to microstrip and stripline routing.
ESD Protection Selection
The protection has to clamp the discharge before it reaches the source chip. A suppressor with a low dynamic resistance and a fast turn on will hold the voltage at the protected node below the damage threshold of the driver, provided the return path is short and the trace between the connector and the device is kept to a minimum.
IEC 61000-4-2 contact discharge testing at eight kilovolts is the usual requirement for a consumer interface. The protection device should be specified for that level with margin, and the specification has to be read carefully, because the quoted clamping voltage is measured with a defined test current and a defined layout. A device that clamps at 12 volts in the datasheet may allow 25 volts at the board if the return path adds inductance.
A common mistake is to place one protection device for several lines and route the pairs to it. The shared trace adds inductance in the discharge path, so the clamp voltage rises in proportion, and the pairs are forced to make a detour that destroys their impedance match. One device per pair, placed on the pair axis, is the arrangement that works.
Clamping Voltage and Capacitance
clamping voltage is the residual voltage at the protected node during a discharge, and it is the number that decides whether the interface survives. It depends on the device, on the current path and on the inductance between the connector and the clamp. Reducing that inductance by placing the device under the connector and returning it directly to the ground plane is as important as choosing a device with a low dynamic resistance.
Capacitance and clamping voltage pull in opposite directions. A device with a large junction area clamps well and presents more capacitance, while a small device presents little capacitance and clamps less effectively. The compromise for a high speed interface is a small device with a fast response, accepting a higher clamp voltage, or a two stage network with a small device at the connector and a larger one behind a series element.
The working voltage also has to be above the maximum signal level on the line, or the device will conduct during normal operation and distort the eye. For a differential pair with a small swing this is easy, while for the five volt power pin the device must be chosen for a higher standoff. Check every pin separately rather than applying one part number everywhere.
Ground Return and Connector Layout
The ground return from the protection devices must be as short as the signal path. A via directly under the device pad, connected to a plane within a fraction of a millimetre, keeps the inductance low, while a return that runs a few millimetres along a trace adds inductance that appears directly in the clamp voltage.
The connector shield should be bonded to the chassis with a low impedance connection, and that connection should be made as close to the shell as the mechanical design allows. Where the board ground and the chassis ground are joined by a capacitor, the capacitor must be placed so the discharge current does not have to cross the signal ground to reach it.
Keep the connector escape area free of unrelated copper. A ground pour that runs under the connector and connects to both the shell and the signal ground gives the discharge two paths, and the division of current between them is unpredictable. Decide which path the discharge should take and make that path the only low impedance option.
Placement of the source chip relative to the connector is the last layout decision. Shorter traces help the eye but also place the sensitive device nearer the point where the discharge enters. The usual compromise is to route the pairs as directly as the components allow, with the protection devices between the connector and the chip, and to accept the additional length that the protection footprint introduces.
Power, Hot Plug Detection and Control Lines
The five volt pin supplies power to the sink and is the most exposed line in the connector. It needs its own protection device with a higher standoff, a series element such as a resettable fuse or a current limit, and a bulk capacitor that can supply the inrush current when the cable is connected. Without the current limit, a short on the cable damages the source.
The hot plug detect line tells the source that a sink is present, and it is often pulled up on the source side with a resistor that is exposed to the connector. A series resistor and a clamp protect the source pin, and the pull up should not be so strong that the resulting current into a shorted cable exceeds the pin rating.
The display data channel is an open drain bus with pull ups, and it is the line most often damaged in the field because it is used by the source and the sink to negotiate formats. Protect both conductors, keep the pull up values within the specification, and route the pair with a return. If the display sometimes negotiates the wrong format, check the rise time of these lines before blaming the firmware; an over long trace with a weak pull up produces marginal edges.
The same discipline used for other high speed interfaces applies here, and our article on high frequency data bus routing covers the loss and crosstalk budget. For the protection side, the method of tracing where the discharge current flows is set out in EMI suppression design.
Compliance Testing and Common Failures
The interface is normally tested with an electrostatic discharge gun at eight kilovolts contact and fifteen kilovolts air discharge, with the port powered and running. The test is applied to the shell and to the pins, and the pass criteria include both survival and continued operation. A board that survives but drops the link has not passed, because the user will see the screen go blank.
The most common failure is not the protection device but the return path. A clamp with a long return produces a high voltage at the protected node, and the driver is damaged even though the device itself survived. The second most common failure is the protection placed on the wrong side of the connector, which leaves the pins unprotected entirely.
Loss of signal integrity after protection is added is the third failure mode, and it usually appears as a link that works at a lower resolution but not at the highest. Measuring the eye at the connector with and without the protection devices fitted shows the penalty directly, and comparing the result with the link budget shows whether a lower capacitance device is required.
FAQ
Do I need protection on every TMDS pair? Yes. The pairs are connected to exposed pins, and a discharge can enter any of them. A device per pair, placed on the pair axis, gives the best combination of protection and signal integrity.
Can I use a single protection array for the whole connector? For the slow control lines an array is convenient, but for the high speed pairs the shared routing and the additional inductance usually cost more than the space saved.
How do I know the clamping voltage is low enough? Compare it with the absolute maximum rating of the device being protected, measured at the board rather than at the component. If the margin is less than a few volts, improve the return path before changing the device.
