PCB Design Key Points: Routing, Ground and Decoupling

Most of the problems that appear in a finished board trace back to a small number of pcb design decisions taken early: how the signal flows, where the ground reference is, how the supply is decoupled and how much space the routing consumes. None of them are exotic, and all of them are cheaper to get right than to correct.

Keeping Signal Paths Separate

Routing direction is the first decision, because different classes of signal should not share a route. Input and output, alternating and direct current, high and low voltage, and fast and slow logic all behave differently, and running them alongside each other transfers energy in the wrong direction.

The ideal is a linear flow from input to output, with the noisy sections physically separated from the sensitive ones. A circular layout is the worst case because it brings the output back alongside the input, and where that cannot be avoided, an isolation band of grounded copper limits the coupling.

PCB design layout showing separated routing areas and copper pour

Deciding Where Ground Is

The ground point is the reference every signal returns to, and its arrangement decides how much noise appears on the quiet parts of the circuit. Current takes the path of least impedance, which at high frequency means the path directly beneath the trace rather than the shortest path through the schematic.

For a circuit with several stages, the returns should meet at one point rather than being chained, so that the current from a power stage does not flow through the reference of a sensitive amplifier. Real boards rarely permit a perfect implementation, but the intent should be visible in the layout.

Decoupling capacitors placed close to an integrated circuit supply pin

Placing Decoupling Capacitors

A decoupling capacitor works because it is close to the device that draws the current. A schematic shows several capacitors connected to a supply rail, but the schematic does not say where they go, and a capacitor placed at the far end of the board does almost nothing.

The rule is simple: one small capacitor at each supply pin of each integrated circuit, connected with the shortest possible loop, and a larger bulk capacitor at the point where the supply enters the board. Where space is tight, a shared capacitor can serve several devices provided the connection is genuinely short.

Trace Width and Via Sizing

Trace width should be as wide as the layout allows. A wider trace has lower resistance and inductance, carries current with less heating and is less affected by etching variation, so there is rarely a reason to use the minimum width except in the densest areas.

Vias follow the same principle. A via that is too small for the current, or a pad that is too small for its drill, produces a weak connection and a joint that is difficult to solder. High voltage and high frequency traces should also avoid sharp corners and right angles, which create field concentration and reflections.

Via Count and Connection Density

Every via is a potential defect and an interruption in the return path, so the number should be kept to what the routing requires rather than added for convenience. A design with an excessive via count also has more opportunities for plating problems during manufacture.

Density matters as much as count. Traces running in parallel at the minimum spacing are difficult to solder and difficult to etch consistently, so spacing should be set with the fabrication and assembly process in mind rather than with the minimum design rule.

Copper Flooding and Its Purpose

Copper flooding is added to enlarge the ground, to improve current capacity and to balance the etching across the board. Where the unconnected area is left bare, thin traces etch faster than the surrounding copper and can end up partially severed, so the pour also protects the artwork.

The pour must be connected and continuous to do any of that. Floating fragments that touch nothing provide none of the benefits, and they can act as a radiator, so the copper that remains after pouring should be reviewed rather than accepted by default.

Thermal Placement

Components that generate heat should be placed where the heat has somewhere to go. Large devices near the board edge transfer heat to the enclosure more easily, and sensitive parts should be positioned upstream of the airflow rather than in the exhaust of a power stage.

Grouping by dissipation also simplifies the layout. Devices that run warm can be arranged together with their own copper area, keeping their thermal influence away from the parts whose accuracy depends on temperature.

Electromagnetic Behaviour

The same decisions that make a board reliable also make it quieter. Short loops radiate less, a continuous reference beneath a trace contains the field, and separating noisy circuits from sensitive ones prevents the coupling that appears as interference in a measurement.

Where the design includes a switching supply, the high current loop is the dominant source and should be made as small as possible. That is usually a matter of placing the input capacitor and the switching device correctly, which costs nothing at layout time.

A Short Review List

Before release, check that the signal flow runs input to output without doubling back, that the ground arrangement follows the current paths rather than the schematic, and that every integrated circuit has decoupling within a few millimetres of its supply pin.

Then confirm that the trace widths match the currents, that the vias are adequate for what they carry, that the pour is connected, and that the thermal placement puts heat where it can escape. Those checks take minutes and address the majority of the problems that reach a prototype.

Layer Allocation and Reference Planes

On a multilayer board the assignment of layers matters more than any individual trace. Signal layers should each have a reference plane beside them, and the plane should be continuous under the traces that use it, so that the return current has a defined path from source to load.

Where two signal layers are adjacent without a plane between them, the coupling between them is significant, which is the same effect the 3w rule addresses on a single layer. Keeping a ground layer between signal layers costs one layer and removes most of the crosstalk that would otherwise have to be managed by spacing.

Design for Assembly

Placement should consider the assembly process as well as the circuit. Components with a preferred orientation, fiducials for the placement machine, adequate spacing for the reflow profile and access for inspection all influence how well the board is built.

Where a board will be tested in circuit, the test points need to be accessible from one side and large enough for the probe. Adding them at layout time costs nothing; retrofitting them to a finished design usually costs a revision.

Documentation and Handover

Design intent should survive the project. A short note recording why a net is routed on a particular layer, why a component was placed in an unusual position or why a rule has an exception saves the next engineer from undoing a deliberate decision.

The same applies to the release package. A stackup drawing, a set of fabrication notes and a layout in a defined revision are what allow the board to be reordered or modified later, and they cost far less to produce now than to reconstruct afterwards.

FAQ

How wide should traces be? As wide as the routing allows, sized at minimum by the current they carry and by any impedance requirement. A narrow trace is a compromise to be justified, not a default.

Does a ground plane remove the need to think about grounding? No. A plane gives a good reference, but the current still has to follow the signal, so splits, slots and crowded via fields under a trace remain problems.

Why does copper flooding improve etching? Because it evens out the amount of copper removed across the panel. Without a pour, isolated thin traces etch faster than the surrounding areas and can be over-etched.

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