Thermal Via Fabrication and Conductive Fill Materials

A thermal via is a hole through the board that is used to move heat rather than to carry a signal. It is one of the few features where the fabrication method decides the thermal performance directly, because a hole that is plated but open, filled with paste or filled with solid copper behaves very differently even when the drill diameter is identical. This article covers the geometry, the fabrication routes, the fill materials, the voiding that degrades them and the design rules that keep the process predictable.

What a Thermal Via Is For

A thermal via carries heat from a hot feature on one side of the board to copper on the other side or to an internal plane. It is used under a thermal pad, around a power device, under a chip scale package and along the edge of a high current path where heat has to move out of the laminate and into a plane that can spread it.

The purpose is conduction, so the metrics are different from those of a signal via. Capacitance and inductance matter far less, while cross sectional copper area, total metal volume and the contact between the metal and the planes on either end matter a great deal.

Via Geometry and Thermal Resistance

Thermal resistance of a via depends on the copper cross section, the board thickness and the conductivity of the metal. A plated barrel is a thin tube of copper, and its cross section is the wall thickness multiplied by the circumference, which is small compared with a solid column of the same diameter. Several small vias in parallel are usually better than one large one, because the total copper area is what counts and small holes are easier to plate evenly.

Pitch matters as well, because the vias have to sit inside the thermal pad without breaching the solder mask dam, and the space between them is filled with laminate that conducts heat poorly. A tight array under the pad gives a lower path resistance than the same number of vias spread over a wider area.

Fabrication Options: Plated, Filled and Capped

The simplest option is a plated through via, which is a copper tube with an open centre. It is cheap and it works, but the open barrel can trap flux and process chemistry, and it can wick solder away from a pad during reflow if it is not tented or plugged. Its thermal performance is limited by the wall thickness.

The next option is a via that is filled with a conductive or non conductive material, which closes the barrel and gives a flat surface for the pad. Above that sits the copper filled via, where the barrel is plated and then filled by electroplating until it is solid, giving the lowest thermal resistance and the best planarity. The trade-off is cost and process difficulty.

Thermal via array under a power device pad on a PCB

Conductive Fill Materials Compared

Conductive epoxy loaded with silver or copper is the common filled via material. A silver filled conductive epoxy gives a thermal conductivity far above the laminate but well below solid copper, and its performance depends on the filler loading and on how well the material wets the barrel. A non conductive fill is used when the via only has to be closed and planar, not when it has to conduct.

The choice has to consider the coefficient of thermal expansion. A fill material that expands differently from the surrounding copper and laminate will stress the interface during thermal cycling, and a via that looks perfect in section can develop a crack after a few hundred cycles. Our via fill notes describe how the different fill types are used in practice.

Voiding and Its Effect on Performance

A void in a filled via is a region with no conductive material, and it raises the thermal resistance of that via in proportion to its size. Voids come from trapped air during filling, from shrinkage as the material cures, and from incomplete filling of a high aspect ratio barrel.

The position of the void matters too. A void at the top of a via sits directly under the thermal pad, where the heat flux is highest and the cross section for spreading is smallest, so it does more damage than the same void in the middle. Filling from the bottom up and using a vacuum assist are the usual ways to reduce them.

Capping, Planarity and Surface Finish

A filled via has to be planar with the surrounding copper so that the pad above it is flat enough for paste printing and for component placement. Capping is the process of plating over the filled via to create that flat surface, and it must not leave a dimple or a bump that later becomes a void under a thermal pad.

The finish applied afterwards has to cover the cap completely. A cap with a pinhole exposes the fill material to the plating chemistry and to the soldering process, and the result is a joint that looks sound and has a small non conductive region inside it.

Design Rules That Keep the Process Workable

Design rules for thermal vias are driven by the fabrication limits. The drill diameter, the pitch, the distance from the pad edge and the annular ring all have to respect the same drilling and plating capability as any other hole, with the added constraint that the array has to be filled uniformly.

The rules also have to consider solder mask. Vias inside a thermal pad need either to be capped or to be covered by a mask dam, and the dam has to be wide enough to survive the process. Our hole copper notes explain how barrel copper thickness is specified and measured, which is the property that limits the thermal performance of a plain plated via.

Verification by Sectioning and Thermal Test

Sectioning a filled via array is the direct check, and it should look at the fill distribution, the void fraction and the interface between the fill and the barrel. A section taken across several vias gives a better picture than one taken through a single barrel.

Microsection of filled and capped thermal vias

Thermal verification closes the loop. A thermal cycling test followed by a section shows whether the interface survives, and an infrared measurement or a thermocouple on a powered assembly shows whether the array delivers the expected temperature. Our thermal cycling notes describe how the test is set up and how the samples are evaluated. Our plating thickness guide covers the measurements that support the fabrication side.

Where Thermal Vias Are Not the Answer

A thermal via array moves heat through the board, so it only helps if there is something on the other side to receive it. Into a large copper plane that is coupled to the chassis or to airflow, the array works well. Into a small isolated island on the far side, it simply relocates the hot spot.

At gopcb the decision is treated as part of the overall thermal management design rather than a local feature, so the receiving plane is designed at the same time as the via array that feeds it.

FAQ

How many thermal vias are needed under a pad? Enough that the total copper cross section keeps the temperature rise within the budget, which is a calculation rather than a fixed count. The array size should come from the thermal requirement and then be checked against the fabrication limits.

Does filling a via improve its thermal resistance? Filling with a conductive material does, because it adds cross sectional area inside the barrel. Filling with a non conductive material only closes the hole and improves planarity.

Can a plated through via be used for thermal conduction? It can, and it is often adequate for a low power device, but its copper cross section is small compared with a filled via. The choice should follow the thermal calculation rather than the process cost alone.

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