Board Level ESD Protection: Chassis Ground, Guard Rings and Placement
Static charge arrives from a person, from the environment or from another part of the same equipment, and it arrives in a few nanoseconds carrying several amperes. What it does to a semiconductor is varied and mostly permanent: it punctures thin insulating layers, it damages the gate of a MOSFET or a CMOS device, it can latch up a CMOS structure so that the device holds itself in a conducting state until the supply is removed, it can short a reverse biased junction or a forward biased one, and in a small package it can melt the bond wire or the aluminium track inside the die. ESD protection is a layout subject as much as a component subject, and most of it is decided by where the ground structures are and where the current is allowed to flow.
Start with the Structure
The single most effective measure is to use a multilayer board. Compared with a two-layer board, a construction in which every signal layer is adjacent to a ground or power plane reduces the common-mode impedance and the inductive coupling between circuits to a tenth or less, and in favourable cases to a hundredth. The mechanism is the return path: a plane offers the induced current a path directly under the trace, so a discharge that would otherwise develop a voltage across a long shared return develops almost nothing.
The rule that follows is to route every signal layer against a plane. Where a high-density board has components on both faces and short connections, moving the routing to an inner layer beside a plane is a cheaper solution than trying to protect the fast signals on the surface.
Where the design is committed to a two-layer board, the substitute for a plane is a tightly interwoven grid. Route the power and the ground beside each other, connect the vertical and horizontal segments and any copper fills as often as the layout permits, and keep the grid pitch below 60 mm, with 13 mm as the target for anything sensitive. Keep every circuit as compact as the placement allows, because a compact circuit has a small loop area by construction.
Connectors, Mounting and the Chassis
The connectors are where the discharge enters. Place them on one side of the board where possible, and bring the supply in at the centre so that the current path to the regulation stage is short and away from the exposed edge.
Under every connector that faces the outside, place a wide chassis ground polygon on all layers of the board, and stitch the layers together with vias at intervals of about 13 mm. This structure gives the discharge a low-impedance route to the chassis that does not pass through a circuit.
Place mounting holes at the edge of the board, with large pads on both faces and the solder mask removed, connected to the chassis ground. The assembly should not be soldered at these points; the connection is made mechanically with a screw and an embedded washer so that the board is bonded firmly to the metalwork. Do not rely on a solder joint for a chassis connection.
Between the chassis ground and the circuit ground, keep a defined isolation gap on every layer, and keep the same gap size throughout so that the impedance is predictable. Around 0.64 mm is the value most often used. The two grounds are then joined deliberately rather than incidentally: place a connection of about 1.27 mm width every 100 mm along the chassis ground, near the mounting positions, and provide for each of those ties to be opened with a blade or bridged with a ferrite bead or a high-frequency capacitor. The ability to open a tie is what allows a grounding experiment to be run on a finished board.
The Guard Ring
A guard ring around the perimeter of the board gives the discharge a preferred path and gives the circuits inside a defined boundary. It is built to a short list of rules.
Run the ring continuously around the periphery on every layer except where the edge connector and the chassis ground occupy the edge. Make the ring wider than 2.5 mm on every layer, and stitch the layers with vias every 13 mm. Connect the ring to the common circuit ground.
On a board that is mounted inside a metal enclosure, the ring is part of that structure, and a two-layer board inside a shield should have its ring connected to the circuit ground. A board that is not shielded has a different arrangement: the ring is connected to the chassis ground, the solder mask is removed from it so that it can act as a discharge bar, and at least one gap of about 0.5 mm is left somewhere in the ring on every layer so that the ring does not form a single large loop. Signal traces should stay at least 0.5 mm away from the ring.
Where a length of the board is directly exposed to discharge, run a ground line beside every signal line in that area. Keep the I/O circuits close to their connectors, and place the circuits that are most sensitive to static discharge toward the centre of the board, where the surrounding circuitry provides some shielding.
Components and Their Placement
The components do most of the fine work, and their placement decides whether they work.
A series resistor or a ferrite bead at the receiver is the usual arrangement, and for a cable driver that is exposed to discharge, the same treatment at the driver end is worth considering. A transient protection device is normally placed at the receiver. Its connection to the chassis ground must be short and wide, with a length of less than five times its width and preferably less than three, because the inductance of that connection is what allows the voltage to rise at the device while the discharge is passing.
The topology matters as much as the component. The incoming signal and its ground should reach the protection device first, and the protected signal should continue from there to the circuit. A device that is connected to the same net as the circuit but placed along a branch of it protects nothing, because the discharge has already reached the circuit before it reaches the device.
Filter capacitors belong at the connector or within 25 mm of the receiving circuit, with a short wide connection to the chassis ground or to the receiver’s ground, again with a length of less than five times the width. The signal and the ground should reach the capacitor before they reach the receiver.
Two component-level cautions are worth remembering. A ferrite bead is not a universal solution: some beads conduct well enough to create an unintended path, and the routing under the bead and between pads that the bead bridges has to be checked. And a signal line that is protected must not be routed parallel to one that is not, because the coupling between them transfers the discharge across the protection.
Routing Rules That Make the Rest Work
Keep the signal lines as short as the placement allows. A line that is longer than 300 mm should have a parallel ground trace running beside it. Keep the loop area between a signal and its return as small as possible, which for a long line means exchanging the positions of the signal and the ground every few centimetres. Drive a signal that feeds several receivers from the centre of the network rather than from one end.
Do the same for the supply. Keep the loop between the supply and the ground small, and place a high-frequency capacitor beside every supply pin of every integrated circuit. Place a high-frequency bypass capacitor within 80 mm of every connector.
Fill the unused areas with ground and connect the fills on all layers every 60 mm. A large fill of more than about 25 mm by 6 mm should be connected to ground at both of its opposite ends rather than at one. Where an opening in a power or ground plane is longer than 8 mm, bridge the two sides with a narrow trace so that the plane does not become two planes.
Treat the reset, interrupt and edge-triggered control lines with particular care. They should be filtered at high frequency, kept away from the input and output circuits, and kept away from the board edge, because a disturbance on one of them changes the state of the whole system rather than corrupting a single data value.
Mechanical Arrangement
The mechanical decisions are part of the protection. The board should sit inside the enclosure rather than at an opening or across an internal seam. Where several boards share one chassis, the board that is most sensitive to static discharge should be mounted in the middle, with the others around it.
The mounting holes themselves should either be connected to the circuit ground or deliberately isolated, and where a metal standoff must be used with a metal chassis, the connection should be made through a zero ohm resistor so that the option remains open. The hole size has to match the standoff, and the pads on both faces should be large, with the solder mask removed on the bottom face and the bottom pads excluded from any wave soldering operation.
All of this is checkable on the drawings, and it is cheaper to check it there. Our design review works through the chassis structure, the guard ring and the protection placement as a set, and for products that are tested as an assembly the construction details that were validated are kept with the build record by our quality management process. Where the electronics are built into an industrial enclosure, the same review is part of our industrial PCBA work.
FAQ
Is a two-layer board acceptable for ESD? It can be, if the power and ground are arranged as a tight grid with frequent connections and every circuit is compact. A multilayer board with planes is far more tolerant.
Why is the connection to the protection device so critical? Because the inductance of that connection adds a voltage while the discharge current is flowing. Short and wide is what keeps the clamp voltage low.
Should the chassis ground and the circuit ground be joined? Yes, at defined points, through a connection that can be opened for testing or bridged with a bead or capacitor.
