HDI Blind and Buried Via Process Chain Explained

High density interconnect design solves the problem of routing a dense board in limited space. The blind and buried via structures that make it possible are produced by a process chain in which each step has a narrow window, and a deviation in any of them shows up as an early field failure rather than as a defect at final test. Understanding the chain is what allows a designer to specify structures that a fabricator can build reliably rather than structures that are merely possible.

The sequence runs from laser via formation through desmear and electroless copper to plating and planarisation, with inspection at each stage. The mechanical and chemical details differ from those of a conventional through hole process, and the tolerances that matter are different as well. The result is that the same nominal via diameter can behave quite differently depending on how it was produced.

Laser Via Formation

The first step is forming the hole. A carbon dioxide laser cannot cut copper, so the copper foil above the target pad must be opened first, either by chemical etching or by a UV laser pre-ablation, before the dielectric can be ablated to reach the inner layer. UV lasers can remove copper and dielectric directly, which simplifies the sequence but at a lower removal rate than a carbon dioxide laser.

The quality of the via depends on matching energy density and pulse width to the material. Too much energy damages the inner layer pad, producing a punch-through defect that is invisible from the surface. Too little leaves residual resin on the target pad, and that residue becomes a separation during plating. Different dielectrics, including standard FR-4, high glass transition laminates and high frequency materials, absorb the beam differently, so the parameters have to be established per material and verified by cross-sectioning a coupon to check the cleanliness of the hole bottom and the verticality of the wall.

<img src="https://www.gopcba.com/wp-content/uploads/2025/05/未标题-11.jpg" alt="Microvia cross-section after laser drilling and copper filling” />

Desmear and Electroless Copper

Laser ablation leaves carbonised residue on the wall of the hole. Unless it is removed, the copper deposited later cannot form a metallurgical bond with the inner layer copper, and the result is a ring separation that appears only when the board is exposed to reflow or thermal cycling. Desmear using permanganate chemistry or a plasma process removes the residue, and the process window has to avoid over-etching the dielectric surface, which would change the geometry and therefore the impedance of the traces above it.

Electroless copper then deposits a thin conductive layer, typically between half a micrometre and one micrometre, on the cleaned wall to serve as the base for electroplating. Coverage and density of that layer depend on the bath temperature, the concentration of the chemistry and the agitation or circulation of the solution inside a small, deep feature. A thin or discontinuous seed layer produces a void in the plating that follows, which is the defect class that microvia reliability testing is designed to detect.

Via Filling and Planarisation

Filling the via by electroplating is the most demanding step in the chain for a blind and buried via structure. Copper must grow from the bottom of the hole upward so that the feature ends as a shallow dimple or a surface flush with the surrounding copper, which is what allows a subsequent via to be stacked directly on top and what keeps the surface flat enough for component placement. Achieving that profile depends on plating chemistry and on the current density distribution across the panel.

Additives do the work: a leveller, an accelerator and an inhibitor act together so that deposition is faster at the bottom of a small feature than at its rim. Pulse plating or a controlled direct current waveform then distributes the current so that the small holes are not starved relative to the large ones. Under-filling leaves a void inside the via, which becomes a stress concentration point during thermal cycling; over-filling produces a bump that must be removed by grinding, and uneven grinding makes the surface copper thickness vary, which changes the impedance of the fine lines on that layer.

Inspection and Reliability Verification

Because the defects produced in this chain are hidden inside the board, inspection relies on destructive and non-destructive methods together. Cross-sectioning a coupon from the production panel shows the hole profile, the cleanliness of the bottom, the plating thickness on the wall and any void in the fill. An X-ray inspection resolves voids in filled vias without destroying the sample, and inline copper thickness measurement tracks the plating process from panel to panel. The acceptance value for the fill dimple is typically specified as no more than about fifteen micrometres.

Reliability testing then demonstrates that the structure survives its service life. Thermal shock and thermal cycling check the plating and the fill under repeated expansion, an interconnect stress test applies current directly to the via chain to accelerate the same failure mode, and a conductive anodic filament test addresses the risk of copper migration through the build-up dielectric under bias and humidity. The principles of the via filling process are described in copper plating and via filling, and the specification side is covered in PCB via plugging and in PCB yield and quality control.

For a designer, the practical conclusion is that laser drilling, desmear, electroless copper, via filling and planarisation form a chain whose weakest step determines the reliability of the board. Structures should be specified against the fabricator’s demonstrated process capability, with the aspect ratio, the target land diameter and the fill requirement stated explicitly, rather than being chosen from a catalogue of possible constructions. The wider options are described in high density interconnect design.

Where the Process Chain Meets the Design

The process constraints become design rules through the fabrication drawing. The aspect ratio of the microvia determines how deep the laser can reliably go for a given diameter, the target land diameter determines how much registration margin the process has, and the fill requirement determines whether the via can be stacked. Where a design needs a structure outside the demonstrated capability, the result is a quotation with a caveat, a yield risk, or a request to change the layout after the file has been released.

The safe approach is to confirm the capability before the stackup is frozen and to state the requirements explicitly: the build-up order, the dielectric thickness of each layer, the via type and its diameter, the fill and planarisation requirement, and the copper weight of each layer. A structure that is inside the process window and documented in those terms is far more likely to be built as designed than one described only by a nominal layer count.

FAQ

Why can a carbon dioxide laser not drill a via directly? Because the beam does not remove copper effectively. The copper foil above the target pad has to be opened by etching or by a UV laser before the dielectric can be ablated.

What causes a via to separate from the target pad? Residual resin left on the pad after laser ablation. Without proper desmear the plated copper cannot bond to the inner layer, and the joint opens during reflow or thermal cycling.

Why does the fill level matter for stacking? Because a stacked via sits on the copper above the filled via. A void or a large dimple leaves an unreliable base, and the second via inherits the defect.