Padless Via Design for High-Density Interconnect

Every via in a conventional board carries a pad: a ring of copper around the drilled hole that exists to absorb the tolerance between where the hole was drilled and where the circuit expects it. That ring is a design compromise, and at high data rates the compromise has a measurable electrical cost. Removing it is not a cosmetic change to the artwork — it is a different way of thinking about what a via is, and it depends on the fabrication process being accurate enough that the tolerance allowance is no longer needed.

What the Annular Ring Costs

The ring is not electrically neutral, and three effects follow from it.

The first is an impedance discontinuity. A trace arrives at the pad and meets a region of wider copper, and the transition is a change in geometry that a fast edge reads as a change in impedance. The result is a reflection at every layer change, and the accumulated effect across a routed channel is measurable insertion loss that no amount of trace tuning removes, because the loss is in the via, not the trace.

The second is a capacitive load. The pad sits above the reference plane and forms a small capacitor to it. The value is small in absolute terms, but it is connected to the signal line and charges from the same edge, which lengthens the rise time of the signal. On fast interfaces the cumulative effect of many vias is a visible degradation of the eye.

The third appears only as the rate rises. The unused portion of the via below the layer where the signal enters — the stub — behaves as an unterminated line, and at high enough rates it resonates at a frequency that falls inside the band being used. The symptom is an increase in jitter without any obvious defect in the routing, and the correction is either to remove the stub or to eliminate the structure that produces it.

What Changed in Fabrication

Padless via construction is possible because drilling accuracy improved. When holes were mechanically drilled, the positional tolerance relative to the artwork demanded a copper ring to guarantee that the hole stayed inside its land. The pad was a tolerance allowance that happened to be made of copper.

Laser drilling changed the arithmetic. Holes can be produced at diameters of a few tens of micrometres with far tighter positional control, and at that scale the via reduces to a copper-lined barrel without a pad. The tolerance the pad existed to absorb no longer needs to be absorbed, so the allowance can be removed rather than spent.

What the Structure Delivers

Removing the pad has three consequences that show up in measurements.

The transmission structure becomes closer to a uniform coaxial line, and the impedance variation along the route falls sharply. Where a conventional via may show a variation of several ohms through the layer change, a padless via keeps the discontinuity much smaller.

The parasitic capacitance falls by roughly an order of magnitude, which improves insertion loss at high rates. The gain is largest exactly where it is most needed, on the fastest channels in the design.

Space is recovered. In a dense ball grid array area, the absence of a pad around each via leaves routing room that would otherwise be occupied by copper, and the available fanout density increases accordingly. In practice this is what allows a design to escape a fine-pitch array with fewer layers or with more room around the remaining traces.

Three Process Requirements

The structure depends on the process holding three things at once.

Drilling has to reach deep, narrow holes without the hole wandering. The ratio of depth to diameter that has to be achieved is far beyond what mechanical drilling manages, and it is held by controlling the beam focus through the depth of the hole as the material is removed.

Plating has to line those deep barrels uniformly. Conventional direct current plating deposits more copper near the surface and less at depth, and a barrel with thin copper in the middle is a reliability problem rather than a performance one. Pulse plating reverses the current periodically, which evens out the deposit and raises the uniformity across the barrel.

Registration has to be tight enough that the via lands where the design intends it to. Because there is no pad to forgive an error, the positional accuracy of the imaging and the drilling becomes the whole margin. Direct imaging systems that write the pattern without a film bring the layer-to-layer alignment error down to a range where padless construction is repeatable.

When It Is Worth Using

The technique has a boundary, and applying it outside that boundary adds cost without benefit. It becomes worthwhile when the signal rate is high enough that the pad’s capacitance and the stub’s resonance matter, or when the hole diameter is small enough that the pad consumes routing space that the design needs.

Between those conditions, the decision is a channel-level one. A board may reasonably use padless construction on the fastest layers and conventional vias everywhere else, which is how the technique is usually deployed in practice.

Compensation and Reliability

Two practical details accompany the design change.

The first is compensation at the via entry. Removing the pad removes the copper that resisted the etch process around the hole, so the entry point is more exposed to variation. A tapered transition at the trace-to-via junction restores a gradual change in geometry and protects against the tolerance the etching process introduces.

The second is proving the result. The reliability question is not whether the barrel conducts on the bench, but whether it survives thermal cycling without cracking, and the accepted test is an interconnect stress test in which the board is cycled between temperature extremes and the resistance of the plated structures is monitored. A construction that behaves well electrically and fails that test is not an improvement.

The Cost Model

Padless vias are not cheaper per operation. Laser drilling and pulse plating cost more than the mechanical drilling and conventional plating they replace, and that increase appears in the price of the board.

The saving comes from elsewhere. Removing the pad frees routing space, which can reduce the number of layers required, and fewer layers means fewer lamination cycles, fewer drilling operations and less material. On a dense high-layer board the reduction in layer count can outweigh the added process cost, which is the case in which the technique pays for itself.

Where the Technique Is Going

The current direction combines the padless via with other structures that live in the same region of the stack. Modified semi-additive processing allows finer conductors to be formed on the surface with the same precision the via now has, and embedding capacitance in the layers immediately around the via allows the supply impedance to be reduced by the same change in construction.

The pattern is the same in each case: as process accuracy improves, the tolerance allowances that older designs spent on safety stop being necessary, and the space they occupied can be given back to performance.

Where this sits alongside the other high-density structures is a question of design intent. Reference plane arrangements around vias are covered in the note on via density and reference planes, the fine-pitch case in the article on via-in-pad for fine-pitch BGA, and the way controlled impedance is specified and verified in the guide to impedance control flow.

FAQ

Does a padless via have any annular ring at all? In practice the design keeps a minimal copper extension rather than none, enough to absorb the small remaining process variation while removing almost all of the parasitic effect the full pad produced.

What limits the technique more, drilling or plating? Both, and the barrel is where they meet. A hole that is drilled accurately still fails if the plating is thin in the middle, and a well-plated barrel still misregisters if the hole is drilled in the wrong place.

How is the reliability of the result verified? By thermally cycling plated structures and monitoring their resistance, which detects cracking in the barrel that a simple continuity check would not reveal.