PCB Edge Plating: Complete Guide to Design and Process

What PCB Edge Plating Is

Edge plating means copper deposited on the cut edge of a printed circuit board. Instead of a bare laminate edge, the board carries a continuous metal surface around part or all of its perimeter. That metal serves three purposes: it shields the board from electromagnetic interference, it provides a low impedance connection to a chassis or a shielding can, and it allows a module to be soldered onto another board along its edge. The most familiar form is the castellated module, where half holes along the edge let a small radio or power module be soldered down like a large component.

The Main Types of Edge Plating

Castellated or half-hole plating. Plated holes are drilled on the board outline and then cut through when the board is profiled, leaving a row of half-cylinder plated contacts. This is the standard for solderable modules. Solid edge plating. A continuous copper band runs along the edge, usually connected to ground, to form a shield or a chassis contact. Wrap-around plating. Copper wraps from the top surface over the edge to the bottom surface, which is used for shielding gaskets and for boards that slide into a metal guide. Local edge plating. Only selected edge segments are plated, for example where the board meets a connector or a grounded bracket.

Design Rules

Copper at the edge. On a plated edge, the copper must extend all the way to the outline; on a non-plated edge, copper should be pulled back by at least 0.5 to 1.0 mm. Mixing the two on the same drawing is the most common source of confusion, so mark each edge segment clearly. Pad to edge. Castellated pads are usually 0.6 to 1.0 mm wide with a pitch matched to the mating footprint, and the hole diameter is chosen so the remaining wall is thick enough to plate reliably. Inset from the corner. Keep castellated features away from tight corners, because the router needs room and the plating is thin at a sharp radius. Plating width. For solid edge plating, a band of 0.5 to 2.0 mm is typical; wider is possible but adds cost. Edge tolerance. Expect around plus or minus 0.1 to 0.2 mm on the profiled edge, and design mating clearances around that number. Panel design. Castellated boards need extra material around the array, because the router must pass through the castellation to open the half holes.

Process Steps

Edge plating is not a single step but a sequence. The plated holes are drilled and plated first, and for castellations the barrel is formed at this stage. The board is then imaged, etched, laminated and finished as usual, with the edge copper defined in the artwork. Before profiling, the edges that must be plated are activated and plated, which requires the panel to be handled so that the plating solution reaches the edge. Finally the board is routed to its outline, and for castellations the router cuts straight through the plated holes, exposing the half barrels. Because the plating happens before the final route, the routed edge itself is not plated on a solid edge design unless the process is arranged specifically for it, which is why the drawing must state the requirement and the fabricator must agree the sequence.

Acceptance Criteria and Inspection

Inspect the plated edge for continuity, plating thickness and burrs. The copper should be continuous along the plated length, with no gaps, nicks or delamination, and the half holes should show a smooth, evenly plated wall. Typical copper thickness on the edge is in the range of 12 to 25 microns, often with a surface finish such as immersion gold or hard gold where the edge is a mating contact. Check the edge for exposed laminate and for solder mask encroachment, which can block a castellation. For modules, the critical check is coplanarity: the castellations must sit flat with the bottom surface so the module reflows cleanly onto the host board.

Cost Drivers

Edge plating adds steps and handling, so it carries a premium. The main drivers are the amount of plated edge, the number of castellations, the plating thickness, the surface finish and the routing sequence. Castellated arrays consume panel area because of the extra routing channel, which lowers panel utilisation. Yield also falls as the plated edge gets longer, because any interruption in plating rejects the board. Keeping the plated length to what the design actually needs, and avoiding mixed plated and non-plated edges on one board, keeps both the price and the risk down.

Edge plating must be planned with the fabricator, because the process sequence and the panel design depend on it. Review how PCB manufacturing handles plated edges and profiling, add the edge requirements to your PCB design and layout documentation, and check the design and manufacturing considerations before release. A prototype PCB assembly run confirms that the castellations reflow reliably onto the host board.

Where Edge Plating Is Used

RF and wireless modules. Castellated edges let a module be soldered directly to the carrier board. Power modules. Half holes carry current and heat into the host board. EMI shielding. A grounded plated edge contacts a shield can or a metal chassis. Card edge interfaces. Plated edges form the mating contacts of plug-in cards. Board-to-board stacks. Wrap-around plating connects two boards mounted face to face with a conductive gasket between them.

FAQ

Is edge plating the same as a castellation? No. Castellation is half-hole plating along the edge; edge plating is a continuous plated band. Modules often use both.

How thick is edge plating? Typically 12 to 25 microns of copper, with an optional gold finish on mating surfaces.

Why does edge plating cost more? Because it adds plating and handling steps, consumes panel area for the routing channel and reduces yield as the plated length grows.

Can any board have a plated edge? In principle yes, but the fabricator must confirm the routing sequence, and mixed plated and non-plated edges should be avoided.

Conclusion

PCB edge plating turns the cut edge of a board into a functional surface: a shield, a chassis contact or a solderable interface. It demands clear design rules, a defined process sequence and a tight edge tolerance, and it costs more than a plain routed edge. Specify what each edge segment needs, keep the plated length to the minimum the design requires, and the result in 2026 will be a module or a shielded board that assembles reliably.